7051 0.0

Simulation VIP for JTAG The Cadence® JTAG Verification IP provides support for the JTAG protocol specification. It provides a mature, highly capable compliance verification s...

7052 0.0

Simulation VIP for LPDDR4 In production since 2015 on dozens of production designs....

7053 0.0

Simulation VIP for LPDDR5 In production since 2015 on dozens of production designs....

7054 0.0

Simulation VIP for MIPI CSI-2 In production since 2008 on dozens of production designs....

7055 0.0

Simulation VIP for MIPI D-PHY, C-PHY and A-PHY Cadence provides a mature and comprehensive Verification IP (VIP) for the D-PHY/C-PHY/A-PHY, which is part of the MIPI family. Incorporating the lates...

7056 0.0

Simulation VIP for MIPI DBI Incorporating the latest protocol updates, the mature and comprehensive Cadence® Verification IP (VIP) for MIPI® DBI-2sm Protocols provides a complete...

7057 0.0

Simulation VIP for MIPI DPI Incorporating the latest protocol updates, the mature and comprehensive Cadence® Verification IP (VIP) for MIPI® DPIsm Protocols provides a complete b...

7058 0.0

Simulation VIP for MIPI DSI-2 In production since 2008 on dozens of production designs....

7059 0.0

Simulation VIP for MIPI I3C In production since 2015 on dozens of production design....

7060 0.0

Simulation VIP for MIPI M-PHY In production since 2011 on dozens of production designs....

7061 0.0

Simulation VIP for MIPI RFFE Cadence provides a mature and comprehensive Verification IP (VIP) for the MIPI® RF Front-End Control Interface (RFFEsm) protocol. Incorporating the la...

7062 0.0

Simulation VIP for MIPI SLIMbus Cadence provides a mature and comprehensive Verification IP (VIP) for the SLIMbus protocol, which is part of the MIPI family. Incorporating the latest...

7063 0.0

Simulation VIP for MIPI SoundWire In production since 2015 on dozens of production designs....

7064 0.0

Simulation VIP for MIPI SoundWire-I3S Best-in-class MIPI® SoundWire-I3Ssm (SWI3S) Verification IP for your IP, SoC, and system-level design testing....

7065 0.0

Simulation VIP for MIPI SPMI Cadence provides a mature and comprehensive Verification IP (VIP) for the MIPI® SPMIsm (System Power Management Interface) protocol. Incorporating the...

7066 0.0

Simulation VIP for MIPI UniPro In production since 2011 on dozens of production designs....

7067 0.0

Simulation VIP for NVMe The Cadence® Verification IP (VIP) for NVMe is part of Cadence's storage interface VIP portfolio. It provides a mature and highly capable compliance v...

7068 0.0

Simulation VIP for OCP In production since 2011 for dozens of designs....

7069 0.0

Simulation VIP for OctaRam In production since 2018 for many production designs....

7070 0.0

Simulation VIP for ONFi In production since 2011 for dozens of production designs....

7071 0.0

Simulation VIP for OSPI NOR In production since 2012 for dozens of designs....

7072 0.0

Simulation VIP for PCIe Used by all leading PCIe, IP, and SoC design verification teams for all generations....

7073 0.0

Simulation VIP for PIPE PHY The Cadence® PIPE PHY Verification IP (VIP) provides a mature, highly capable verification solution for the PHY layer of complex protocols such as PCI...

7074 0.0

Simulation VIP for PLB In production since 2011....

7075 0.0

Simulation VIP for PMBus Incorporating the latest protocol updates, the Cadence® Verification IP (VIP) for PMBus provides a complete bus functional model (BFM), integrated aut...

7076 0.0

Simulation VIP for Q-SPI In production since 2018 for many production designs....

7077 0.0

Simulation VIP for SAS The Cadence® Verification IP (VIP) for SAS is part of Cadence’s broad storage interface verification IP (VIP) portfolio. Serial Attached SCSI (SAS) ha...

7078 0.0

Simulation VIP for SD CARD and SDIO In production since 2012 for many production designs....

7079 0.0

Simulation VIP for SMBus Incorporating the latest protocol updates, the Cadence® Verification IP (VIP) for SMBus provides a complete bus functional model (BFM), integrated aut...

7080 0.0

Simulation VIP for SPDIF Incorporating the latest protocol updates, the mature and comprehensive Cadence® Verification IP (VIP) for the SPDIF protocol provides a complete bus ...

7081 0.0

Simulation VIP for SPI This Cadence® Verification IP (VIP) provides support for the SPI protocol. The SPI VIP provides a complete bus functional model (BFM) and integrated a...

7082 0.0

Simulation VIP for SPI NAND In production since 2016 for many production designs....

7083 0.0

Simulation VIP for TileLink This Cadence® Verification IP (VIP) provides support for the TileLink specification. It provides a highly capable compliance verification solution sim...

7084 0.0

Simulation VIP for Toggle NAND In production since 2011 for many production designs....

7085 0.0

Simulation VIP for UART Best-in-class UART Verification IP for your IP, SoC and system-level design testing. In production since 2014 on dozens of production designs....

7086 0.0

Simulation VIP for UCIE Best-in-class UCIe Verification IP for your IP, SoC, and system-level design testing....

7087 0.0

Simulation VIP for UCIE Best-in-Class UCIe Verification IP for your IP, SoC, and System-Level Design Testing The Cadence Verification IP (VIP) for Universal Chiplet Interconn...

7088 0.0

Simulation VIP for UFS In production since 2012 on multiple production designs....

7089 0.0

Simulation VIP for USB The Cadence® Verification IP (VIP) for USB is a complete VIP solution for the Universal Serial Bus Revision 3.2 Specification and errata. It provides ...

7090 0.0

Simulation VIP for USB4 Used by all top market leaders semiconductor companies....

7091 0.0

Simulation VIP for xSPI xSPI in production since 2019 for many production designs....

7092 0.0

Single Channel HDLC Controller Inicore's iniHDLC family of High-Level Data Link Controller (HDLC) cores consist of a Receiver (FPR: From Primary Rate) and a Transmitter (TPR: To Pri...

7093 0.0

Single stage low noise amplifier from 2-6 GHz with flat gain, low Noise Figure, high isolation, stability. RFLN04C is a single stage low noise amplifier with flat gain, low Noise Figure, high isolation, stability. The LNA is designed to operate from 2-6 GHz...

7094 0.0

PipelineZero 32-bit Embedded Processor The BA20 is a small, ultra-low-power, and very efficient 32-bit processor. It is an excellent step up from the 8051 and other 8- and 16-bit microcontr...

7095 0.0

MIPI C-PHY 2.1 TX/RX, 6nm InPsytech proudly presents our groundbreaking innovation, the MIPI C-PHY Ver2.1 IP, setting new standards in connectivity solutions. Designed to empow...

7096 0.0

MIPI C-PHY v1.2 D-PHY v2.1 RX 2 trios/2 Lanes in GlobalFoundries (12nm) Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

7097 0.0

MIPI C-PHY v1.2 D-PHY v2.1 RX 3 trios/4 Lanes in GlobalFoundries (12nm) for Automotive Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

7098 0.0

MIPI C-PHY v1.2 D-PHY v2.1 RX 3 trios/4 Lanes in Samsung (SF2P) Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

7099 0.0

MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes for TSMC 12FFCP Synopsys’ integrated DesignWare C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and...

7100 0.0

MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in GlobalFoundries (12nm) for Automotive Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...