Design & Reuse
8684 IP
8151
0.0
TSMC CLN28HPCLVT 28nm LPDDR5 PHY - 3200Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
8152
0.0
TSMC CLN28HPCLVT 28nm Multi Phase DLL - 220MHz-1100MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
8153
0.0
TSMC CLN28HPCLVT 28nm Multi Phase DLL - 440MHz-2200MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
8154
0.0
TSMC CLN28HPCLVT 28nm Multi Phase DLL - 880MHz-4400MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
8155
0.0
TSMC CLN28HPCLVT 28nm Spread Spectrum PLL - 188MHz-943MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
8156
0.0
TSMC CLN28HPCLVT 28nm Spread Spectrum PLL - 378MHz-1890MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
8157
0.0
TSMC CLN28HPCLVT 28nm Spread Spectrum PLL - 754MHz-3770MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
8158
0.0
TSMC CLN28HPCLVT 28nm Ultra PLL - 15MHz-3000MHz
The Ultra PLL is designed with a state-of-the-art architecture using high-speed digital and analog circuits that offers exceptional performance, featu...
8159
0.0
TSMC CLN28HPCP 28nm DDR3 PHY - 2133Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
8160
0.0
TSMC CLN28HPCP 28nm DDR4 PHY - 2933Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
8161
0.0
TSMC CLN28HPCP 28nm DDR5 PHY - 3200Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
8162
0.0
TSMC CLN28HPCP 28nm LPDDR3 PHY - 2133Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
8163
0.0
TSMC CLN28HPCP 28nm LPDDR4 PHY - 2933Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
8164
0.0
TSMC CLN28HPCP 28nm LPDDR5 PHY - 3200Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
8165
0.0
TSMC CLN28HPCPLVT 28nm DDR3 PHY - 2133Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
8166
0.0
TSMC CLN28HPCPLVT 28nm DDR4 PHY - 2933Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
8167
0.0
TSMC CLN28HPCPLVT 28nm DDR5 PHY - 3200Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
8168
0.0
TSMC CLN28HPCPLVT 28nm LPDDR3 PHY - 2133Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
8169
0.0
TSMC CLN28HPCPLVT 28nm LPDDR4 PHY - 2933Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
8170
0.0
TSMC CLN28HPCPLVT 28nm LPDDR5 PHY - 3200Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
8171
0.0
TSMC CLN28HPL 28nm DDR3 PHY - 2133Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
8172
0.0
TSMC CLN28HPL 28nm DDR4 PHY - 2933Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
8173
0.0
TSMC CLN28HPL 28nm DDR5 PHY - 3200Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
8174
0.0
TSMC CLN28HPL 28nm LPDDR3 PHY - 2133Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
8175
0.0
TSMC CLN28HPL 28nm LPDDR4 PHY - 2933Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
8176
0.0
TSMC CLN28HPL 28nm LPDDR5 PHY - 3200Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
8177
0.0
TSMC CLN28HPL 28nm Ultra PLL - 15MHz-3000MHz
The Ultra PLL is designed with a state-of-the-art architecture using high-speed digital and analog circuits that offers exceptional performance, featu...
8178
0.0
TSMC CLN28HPM 28nm DDR3 PHY - 2133Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
8179
0.0
TSMC CLN28HPM 28nm DDR4 PHY - 2933Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
8180
0.0
TSMC CLN28HPM 28nm DDR5 PHY - 3200Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
8181
0.0
TSMC CLN28HPM 28nm LPDDR3 PHY - 2133Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
8182
0.0
TSMC CLN28HPM 28nm LPDDR4 PHY - 2933Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
8183
0.0
TSMC CLN28HPM 28nm LPDDR5 PHY - 3200Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
8184
0.0
TSMC CLN28HPM 28nm Ultra PLL - 15MHz-3000MHz
The Ultra PLL is designed with a state-of-the-art architecture using high-speed digital and analog circuits that offers exceptional performance, featu...
8185
0.0
TSMC CLN28LP 28nm DDR3 PHY - 2133Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
8186
0.0
TSMC CLN28LP 28nm DDR4 PHY - 2933Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
8187
0.0
TSMC CLN28LP 28nm DDR5 PHY - 3200Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
8188
0.0
TSMC CLN28LP 28nm IoT PLL - 30MHz-400MHz
The IoT PLL is designed for very low power, sipping only 45uW at 30MHz and running from core power. It has a wide frequency range with multiplication ...
8189
0.0
TSMC CLN28LP 28nm LPDDR3 PHY - 2133Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
8190
0.0
TSMC CLN28LP 28nm LPDDR4 PHY - 2933Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
8191
0.0
TSMC CLN28LP 28nm LPDDR5 PHY - 3200Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
8192
0.0
TSMC CLN28LP 28nm Ultra PLL - 15MHz-3000MHz
The Ultra PLL is designed with a state-of-the-art architecture using high-speed digital and analog circuits that offers exceptional performance, featu...
8193
0.0
TSMC CLN3P 3nm Clock Generator PLL - 200MHz-1000MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
8194
0.0
TSMC CLN3P 3nm Clock Generator PLL - 400MHz-2000MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
8195
0.0
TSMC CLN3P 3nm Clock Generator PLL - 800MHz-4000MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
8196
0.0
TSMC CLN3P 3nm DDR DLL - 188MHz-940MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
8197
0.0
TSMC CLN3P 3nm DDR DLL - 250MHz-1250MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
8198
0.0
TSMC CLN3P 3nm DDR DLL - 395MHz-1975MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
8199
0.0
TSMC CLN3P 3nm Deskew PLL - 200MHz-1000MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
8200
0.0
TSMC CLN3P 3nm Deskew PLL - 400MHz-2000MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...