Design & Reuse
8684 IP
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12-bit, 500 MSPS, Analog-Digital-Converter (ADC), IP block, TSMC 12nm
The A12B400M is a low-power, high-speed analog to digital converter (ADC) intellectually property (IP) design block. It is a hybrid successive a...
252
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224G Ethernet PHY IP for TSMC N3E
The Synopsys 224G Ethernet PHY IP, an integral part of Synopsys’ high-speed SerDes IP portfolio, meets the growing high bandwidth and low latency need...
253
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224G Ethernet PHY IP for TSMC N3P
The Synopsys 224G Ethernet PHY IP, an integral part of Synopsys’ high-speed SerDes IP portfolio, meets the growing high bandwidth and low latency need...
254
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128-Point FFT/IFFT
The FFT4T core implements a 128 point complex FFT and IFFT over 12 data streams in hardware. It runs at the clock frequency four times higher than the...
255
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I2C VMM Enabled Verification IP
eInfochips’ I2C VMM based VIP is highly configurable, reusable, scalable and extensible verification intellectual property that is suitable for verifi...
256
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22NM LVDS PHY IP
The InPsytech Low-Voltage Differential Signaling (LVDS) is a well-established high-speed interface known for its excellent combination of fast data ra...
257
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I2S Controller IP Core- Two Channel
The Arasan I2S Controller IP Core is a two-channel I2S serial audio controller compliant to the Philips* Inter-IC Sound specification. The I2S bus is ...
258
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I3C Prototyping Kit (HDK) Total IP in a Box
The I3C Total IP in a box HDK gives I3C SoC developers all the resources they need to implement MIPI I3C specifications right out of the box. The HDK...
259
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14-bit 80MSPS Flash Analog to Digital Converter (ADC) IP Block UMC 90nm
The A14B80M is an ultra low-power, high-performance analog to digital converter (ADC) intellectual property (IP) design block. It has 14-bit resoluti...
260
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14-bit, 12p5MSPS Analog-to-Digital Converter (ADC) IP block Tower 65nm
The A14B12p5M is a high-performance, low-power analog-to-digital converter (ADC) intellectual property (IP) block designed for applications requiring ...
261
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14-bit, 200 MSPS Digital-to-Analog Converter (DAC) IP block GF 22nm
The D14B200M is a low-power, high-speed digital to analog converter (DAC) intellectual property (IP) design block. It is a current-steering DAC, with ...
262
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14-bit, 200 MSPS Digital-to-Analog Converter (DAC) IP block TSMC 28nm
The D14B200M-TS28H is an ultra low-power, high-speed digital to analog converter (DAC) intellectual property (IP) block. It is a current steering DAC ...
263
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14-bit, 400 MSPS Analog-to-Digital Converter (ADC) IP Block TSMC 28nm
The A14B400M is a low-power, highspeed analog to digital converter (ADC) intellectual property (IP) design block. It is a Successive-Approximation-...
264
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666 Mbps LVDS Transceiver IP
The MXL-TXRX-LVDS is a LVDS transceiver implemented in digital CMOS technology. It supports up to 666 Mbps. It is compatible with IEEE Std 1596, EIA-6...
265
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28G Ethernet PHY IP for TSMC N7
The multi-lane Synopsys Multi-Protocol 32G PHY IP is part of Synopsys’ high-performance multi-rate transceiver portfolio for high-end networking and ...
266
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CAN 2.0 Verification IP
eInfochips’ CAN 2.0 Verification IP Product is the Industry’s most comprehensive protocol validation solution for predictable verification of CAN base...
267
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CAN 2.0B Bus Controller IP Core
The Controller Area Network (CAN) controller IP that implements the CAN2.0A, CAN2.0B as well as newer high performance Non ISO CAN-FD protocols. It ca...
268
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UART VMM based Verification IP
The VMM based UART VIP is complaint to National Semiconductor 16550 design. The UART interface allows a duplex, asynchronous, serial communication and...
269
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Path Margin Monitor IP
The Path Margin Monitor (PMM) solution consists of multiple PMM units, a PMM controller, and associated software & EDA automation. PMM IP is a buildin...
270
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HBM Verification IP
The Atria Logic High Bandwidth Memory (HBM) Verification IP is a System Verilog (SV) based IP that can be used to verify a HBM memory controller desig...
271
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HBM3 PHY IP for TSMC N4
The Synopsys HBM3 PHY is a complete physical layer IP interface (PHY) solution for high-performance computing (HPC), AI, graphics, and networking ASIC...
272
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HBM3 PHY IP for TSMC N7
The Synopsys HBM3 PHY is a complete physical layer IP interface (PHY) solution for high-performance computing (HPC), AI, graphics, and networking ASIC...
273
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HBM3 PHY IP on TSMC N5
The Synopsys HBM3 PHY is a complete physical layer IP interface (PHY) solution for high-performance computing (HPC), AI, graphics, and networking ASIC...
274
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HBM4 Controller IP is optimized for power, latency, bandwidth, and area, supporting the JEDEC HBM4 standard
The Synopsys HBM4 Controller IP is optimized for power, latency, bandwidth, and area, supporting the JEDEC HBM4 standard. It interoperates with Synops...
275
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VC Verification IP for AMBA 4 AXI
Synopsys VC Verification IP (VIP) for ARM® AMBA® AXI™ provides complete protocol support for AXI3™, AXI4™, AXI4-Lite™, AXI4-Stream™, ACE™, ACE-Lite™ ,...
276
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VC Verification IP for AMBA 5 CHI
Synopsys VC Verification IP (VIP) for ARM® AMBA® 5 CHI protocol specification provides a comprehensive set of protocol, methodology, verification and ...
277
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VC Verification IP for CPRI
Synopsys® VC Verification IP for CPRI provides a comprehensive set of protocol, methodology, verification, and productivity features, enabling users t...
278
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VC Verification IP for DDR5
Synopsys® VC Verification IP for JEDEC DDR5, deployed in November 2016, provides a comprehensive set of protocol, methodology, verification, and produ...
279
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VC Verification IP for Ethernet
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280
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VC Verification IP for Ethernet
Synopsys VC Verification IP (VIP) for Ethernet provides complete support for Ethernet 10/100/1000M/10G/40G and 100G interfaces. With a comprehensive s...
281
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VC Verification IP for Fibre Channel
Synopsys VC Verification IP (VIP) for Fibre Channel is designed to thoroughly verify Fibre Channel designs using both random and directed simulation. ...
282
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VC Verification IP for HDMI
Synopsys VC Verification IP (VIP) for HDMI provides a comprehensive set of protocol, methodology, verification and productivity features, enabling use...
283
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VC Verification IP for HSI
Synopsys VC Verification IP for MIPI HSI is a comprehensive VIP solution enabling pre-silicon functional verification of MIPI HSI (High-speed synchron...
284
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VC Verification IP for I2C
Synopsys VC Verification IP for I2C includes all protocol speeds. With a comprehensive set of protocols, methodology, verification and ease-of-use fea...
285
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VC Verification IP for I2S
Synopsys VC Verification IP (VIP) for I2S provides a comprehensive set of protocol, methodology, verification and productivity features, enabling user...
286
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VC Verification IP for Interlaken
Synopsys® VC Verification IP for Interlaken provides a comprehensive set of protocol, methodology, verification and productivity features, enabling us...
287
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VC Verification IP for MIPI CSI-2 (C-PHY / D-PHY)
Synopsys VC Verification IP (VIP) for MIPI Camera Serial Interface 2 (CSI-2) provides a comprehensive set of protocol, methodology, verification and p...
288
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VC Verification IP for MIPI DigRFv4
Synopsys VC Verification IP for MIPI DigRF provides a comprehensive set of protocol, methodology, verification and productivity features, enabling use...
289
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VC Verification IP for MIPI DSI
Synopsys VC Verification IP for MIPI Display Serial Interface (DSI) provides a comprehensive set of protocol, methodology, verification and productivi...
290
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VC Verification IP for MIPI DSI
Synopsys® Verification IP (VIP) for UCIe provides a comprehensive set of protocol, multi-die, methodology, verification, and productivity features ena...
291
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VC Verification IP for MIPI M-PHY
Synopsys VC Verification IP for MIPI M-PHY provides a comprehensive set of protocol, methodology, verification and productivity features, enabling use...
292
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VC Verification IP for NVMe
Synopsys VC VIP for Non-Volatile Memory Express (NVMe) is designed to help thoroughly verify NVMe designs using both random and directed simulation....
293
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VC Verification IP for OCP
Synopsys VC Verification IP (VIP) for OCP provides a comprehensive set of protocol, methodology, verification and productivity features enabling users...
294
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VC Verification IP for PCIe
Synopsys VC Verification IP (VIP) for PCI Express (PCIe) provides a comprehensive set of protocol, methodology, verification and productivity features...
295
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VC Verification IP for SAS
Synopsys VC Verification IP (VIP) Serial SCSI (SAS) is designed to thoroughly verify your design using both random and directed simulation....
296
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VC Verification IP for SATA
Synopsys VC Verification IP (VIP) for Serial ATA (SATA) is designed to verify SATA-based designs using both random and directed simulation....
297
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VC Verification IP for SDIO
Synopsys VC Verification IP (VIP) for SDIO is a comprehensive VIP solution enabling pre-silicon functional verification of SD (Secure Digital) IO/Memo...
298
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VC Verification IP for TileLink
Synopsys® Verification IP for TileLink provides a comprehensive set of protocol, methodology, verification, and productivity features, enabling users ...
299
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VC Verification IP for UART
Synopsys VC Verification IP (VIP) for UART provides a comprehensive set of protocol, methodology, verification and productivity features, enabling use...
300
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VC Verification IP for UFS
Synopsys® VC Verification IP for the JEDEC UFS memory protocol specification provides a comprehensive set of protocol, methodology, verification and p...