2601 0.118

Two Port Register File Compiler IP, UMC 0.35um process UMC 0.35um Logic process standard asynchronous low density Low Power Two Port (1R1W) SRAM memory compiler....

2602 0.118

Two Port Register File Compiler IP, UMC 0.35um process UMC 0.35um Logic process synchronous high density Two Port (1R1W) SRAM memory compiler....

2603 0.118

Two Port Register File Compiler IP, UMC 0.35um process UMC 0.35um Logic process synchronous low density Low Power Two Port (1R1W) SRAM memory compiler....

2604 0.118

Two Port Register File Compiler IP, UMC 0.35um process UMC 0.35um Logic process standard asynchronous high density Two Port (1R1W) SRAM memory compiler....

2605 0.118

Two Port Register File Compiler IP, UMC 0.35um process UMC 0.35um Logic process standard asynchronous low density Low Power Two Port (1R1W) SRAM memory compiler....

2606 0.118

Two Port Register File Compiler IP, UMC 0.35um process UMC 0.35um Logic process synchronous high density Two Port (1R1W) SRAM memory compiler....

2607 0.118

Two Port Register File Compiler IP, UMC 0.35um process UMC 0.35um Logic process synchronous low density Low Power Two Port (1R1W) SRAM memory compiler....

2608 0.118

Two Port Register File Compiler IP, UMC 28nm HLP process UMC 28nm HLP/ Low-K Two Port Register File compiler....

2609 0.118

Two Port Register File Compiler IP, UMC 28nm HLP process UMC 28nm HLP peripheral LVT Two Port Register File memory compiler....

2610 0.118

Two Port Register File Compiler IP, UMC 40nm LP process UMC 40nm LP/RVT Low-K Logic Two Port Register File memory compiler....

2611 0.118

Two Port Register File Compiler IP, UMC 40nm LP process UMC 40nm LP/LVT process, Two Port Register File with LVT....

2612 0.118

Two Port Register File Compiler IP, UMC 40nm LP process UMC 40nm LP Two Port Register File with Sleep/Retention/Nap mode feature....

2613 0.118

Two Port Register File Compiler IP, UMC 55nm LP process UMC 55nm LP Logic process Synchronous Two Port Register File memory compiler....

2614 0.118

Two Port Register File Compiler IP, UMC 55nm LP process UMC 55nm LP/ Low-K process PG Two Port Register File compiler....

2615 0.118

Two Port Register File Compiler IP, UMC 55nm SP process UMC 55nm SP/RVT and HVT Low-K Logic process synchronous ultra high density/6T cell Two Port Register File memory compiler....

2616 0.118

Two Port Register File Compiler IP, UMC 55nm SP process UMC 55nm SP Low-K Logic process synchronous Two Port Register File memory compiler....

2617 0.118

Two Port Register File Compiler IP, UMC 65nm LL process UMC 65nm LL/RVT Low-K Logic process synchronous high density Two Port Register File SRAM memory compiler....

2618 0.118

Two Port Register File Compiler IP, UMC 65nm SP process UMC 0.65um SP/RVT Low-K Logic process synchronous Two Port Register File memory compiler....

2619 0.118

Two Port Register File Compiler IP, UMC 90nm LL process UMC 90nm LL/RVT Synchronous high density Two Port Register File memory compiler....

2620 0.118

Two Port Register File Compiler IP, UMC 90nm SP process UMC 90nm Standard Performance Low-K process Two Port SRAM Register File compiler....

2621 0.118

Two Port Register File Compiler IP, UMC 90nm SP process UMC 90nm SP Logic Low-K process synchronous Two Port (1R1W) Register File SRAM memory compiler....

2622 0.118

FXAFE030HH0L is an Analog Front End IP for image processing applications. FXAFE030HH0L is fabricated in UMC 40 nm logic LP/HVT Low-K process to implement a signal processing solution for scanners, video and imaging applications. _x005F_x005F_x005F_x000D_ FXAFE030HH0L is an Analog Front End IP for image processing applications. FXAFE030HH0L is fabricated in UMC 40 nm logic LP/HVT Low-K process to implem...

2623 0.118

AXI Bus Controller IP, Bus Controller, Soft IP Register Slice Controller with AXI bus interface....

2624 0.118

AXI system Peripheral IP, AXI Bus System Interconnect, Soft IP AXI bus interconnect....

2625 0.118

AXI system Peripheral IP, AXI to AXI Bridge, Soft IP AMBA AXI to AXI Bridge....

2626 0.118

AXI system Peripheral IP, AXI/APB host bridge, Soft IP AXI/APB host bridge controller....

2627 0.118

AXI system Peripheral IP, Cache Controller, L2 Cache, Soft IP L2 cache controller with AXI interface....

2628 0.118

AXI system Peripheral IP, DMA controller for AXI master port and slave port (32 - bit, 64 - bit and 128 - bit), 8 channels DMA, Soft IP DMA controller with AXI interface....

2629 0.118

AXI system Peripheral IP, Interrupt Controller, Soft IP Generic Interrupt Controller with AXI interface. Faraday's FTINTC030 Generic interrupt controller supports software generated interrupt, private perip...

2630 0.0

H 265 Video Encoder IP Our Video Encoder IP Core is a real-time, true multi-format hardware encoder IP supporting H.264/AVC, H.265/HEVC, VP9 video codecs and JPEG still imag...

2631 0.0

1-56G-PCIe Gen5 ePHY Multi-Protocol SerDes IP - 7nm Low Power and Latency Ultra-high speed SerDes IP, adopted by global Tier-1 network/storage/5G OEMs and major semiconductor companies. eTopus is the pioneer on PAN4 ADC/DSP...

2632 0.0

V-By-One Receiver IP VBYONE Receiver core is compliant with standard VByOne specification as 1.2/1.3/1.4. Through its compatibility, it provides a simple interface to a wi...

2633 0.0

V-by-One Rx IP, Silicon Proven in 40G Using internal equipment connections, the V-by-One HS technology seeks to send video signals at a high data rate. The V-by-One HS Standard outlines th...

2634 0.0

V-by-One Rx IP, Silicon Proven in SMIC 40LL The V-by-One HS technology aims to transmit video signals at a high data rate using internal equipment connections. The requirements to create a trans...

2635 0.0

V-By-One Transmitter IP VBYONE Transmitter core is compliant with standard VByOne specification as 1.2/1.3/1.4. Through its compatibility, it provides a simple interface to a...

2636 0.0

V-by-One Tx IP, Silicon Proven in 40G The V-by-One HS technology aims to transmit video signals at a high data rate using an internal connection between devices. The requirements to create...

2637 0.0

V-by-One Tx IP, Silicon Proven in SMIC 40LL V-by-One HS technology targets a high-speed data transmission of video signals based on the internal connection of equipment. V-by-One® HS Standard de...

2638 0.0

V-by-One/ LVDS Tx IP, Silicon Proven in SMIC 40LL The V-by-One® HS technology aims to transmit video signals at a high data rate using internal equipment connections. The requirements to create a tran...

2639 0.0

V-by-One/LVDS Rx IP, Silicon Proven in GF 22FDX The V-by-One® HS technology aims to transmit video signals at a high data rate using internal equipment connections. The requirements to create a tran...

2640 0.0

V-by-One/LVDS Rx IP, Silicon Proven in SMIC 40LL V-by-One® HS technology targets a high-speed data transmission of video signals based on internal connection of equipment. V-by-One® HS Standard defin...

2641 0.0

V-by-One/LVDS Tx IP, Silicon Proven in GF 22FDX Based on internal equipment connections, the V-by-One® HS technology aims to transmit video signals at high data rates. The requirements to build a tr...

2642 0.0

D-MOT-10 FPGA IP Core For Motion Detection In Video Stream Images The D-MOT-10 FPGA IP core for motion detection in video stream images is a completed module intended to be used in vision systems for various applicat...

2643 0.0

H.264 Audio & Video Decoder IP The H.264 Decoder IP Core is a full-featured, easy-to-use, synthesizable design that is easily integrated into any SoC or FPGA development. The H.264 ...

2644 0.0

H.264/265 Video Encoder and Decoder IP The Hardware Encoder Video Accelerator (HEVA), supports HEVC encoding low complexity with a flexible architecture targeting at least 1080p60 with mini...

2645 0.0

H.265 Video Encoder/Decoder IP Core The H265 HEVC video encoder IP core is a single-chip solution designed to support H.265 video encoding across various resolutions, including QVGA, SD,...

2646 0.0

1.2V->0.8V Low/Ultra-low Power LDO Comparator IP Core A 1.2V->0.8V Low/Ultra-low Power LDO Comparator (Low Drop-Out) is a type of voltage regulator designed to provide a stable output voltage of 0.8 volts...

2647 0.0

4.2V->3.3V Low/Ultra-low Power LDO IP Core A 4.2V -> 3.3V low power LDO (Low Drop-Out) is a type of voltage regulator designed to provide a stable output voltage of 3.3 volts from a 4.2-volt in...

2648 0.0

3.3V - >1.2V/1.1V/0.9V Low Power Cap-less LDO IP Core A 3.3V - >1.2V/1.1V/0.9V Low Power Cap-less LDO (Low Drop-Out) is a type of voltage regulator designed to provide a stable output voltage of 0.9 volts...

2649 0.0

3.3V ->1.1V/0.9V Cap-less LDO IP Core A 3.3V -> 1.1V low power LDO (Low Drop-Out) is a type of voltage regulator designed to provide a stable output voltage of 1.1 volts from a 3.3-volt in...

2650 0.0

3.3V- >1.2/1.1V/0.9V Ultra-low Power LDO IP Core A 3.3V->1.2V/1.0V/0.8V Low/Ultra-low Power LDO (Low Drop-Out) is a type of voltage regulator designed to provide a stable output voltage of 0.8 volts ...