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VC Verification IP for USB Synopsys® VC Verification IP for USB provides a comprehensive set of protocol, methodology, verification and productivity features, enabling users to ...

302 0.0

PCIe 4.0 PHY IP for SS 14LPU The multi-channel Synopsys PHY IP for PCI Express® 4.0 includes Synopsys’ high-speed, high-performance transceiver to meet today’s applications’ deman...

303 0.0

PCIe 5.0 Controller IP The Wolley PCI Express® (PCIe®) Controller IP is a highly configurable, performance-optimized core designed for ASIC and FPGA integration. Supporting ...

304 0.0

PCIe 5.0 IP on Samsung SF5 The multi-channel DesignWare® PHY IP for PCI Express® (PCIe®) 5.0 includes Synopsys’ high-speed, high-performance transceiver to meet today’s demands ...

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PCIe 5.0 PHY IP for TSMC N5 The multi-channel Synopsys PHY IP for PCI Express® 5.0 and CXL includes Synopsys’ high-speed, high-performance transceiver to meet today’s application...

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PCIe 6.0 Controller IP The Wolley PCI Express® (PCIe®) Controller IP is a highly configurable, performance-optimized core designed for ASIC and FPGA integration. Supporting ...

307 0.0

PCIe 6.0 PHY IP for TSMC N3E The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 6.0 meets today’s demands for higher bandwidth and power efficiency across network interfac...

308 0.0

PCIe 6.0 PHY IP for TSMC N4P The multi-channel Synopsys PHY IP for PCI Express (PCIe) 6.0 meets today’s demands for higher bandwidth and power efficiency across network interface ...

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PCIe 6.0 PHY IP for TSMC N5 The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 6.0 meets today’s demands for higher bandwidth and power efficiency across network interfac...

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PCIe 6.0 PHY NCS IP for TSMC (N3E, N3P) The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 6.0 meets today’s demands for higher bandwidth and power efficiency across network interfac...

311 0.0

PCIe 7.0 Integrity and Data Encryption (IDE) Security IP Module PCI Express is a ubiquitous interface for a wide variety of applications, from connecting accelerators and peripheral devices to data center servers t...

312 0.0

UCIe PHY IP on TSMC N3P Synopsys UCIe PHY IP enables high-bandwidth, low-power and low-latency die-to-die connectivity in a package for hyperscale data centers, AI, and netw...

313 0.0

2D Graphics IP Core DMP K3000 2D GPU IP Core offers the most powerful rendering performance in the industry, with a minimum area solution. You will witness blazing font a...

314 0.0

HDCP 2.0 Encryption Suite HDCP Suite consists of hardware and software components implementing the HDCP 2.0 protocol. The hardware components are fully synchronous and availabl...

315 0.0

SDIO HOST VMM based Verification IP The Secure Digital Input Output (SDIO) interface is a card interface defined to connect a SD Host Controller with four different types of cards, namel...

316 0.0

3DIO PHY IP for TSMC N5 Synopsys 3DIO is a specialized IO for multi-die integration. It includes multiple IP offerings for system-on-chip (SoC) designers to implement tunable...

317 0.0

DDR5 PHY IP for TSMC N3P The Synopsys DDR5/4 PHY is a complete physical layer IP interface (PHY) solution for ASIC, ASSP, and system-on-chip (SoC) applications requiring high-...

318 0.0

LDS High Speed JPEG Codec - High Speed Low Power JPEG Codec IP Core High Speed Low Power JPEG Codec IP Core...

319 0.0

Real-Time GPU IP for Path Tracing RayCore MC is the World's best real-time path tracing GPU IP. It's path tracing and soft shadow techniques present the highest quality of phot...

320 0.0

Vector Graphics IP core supporting OpenVG1.1 subset The ant200 is the world’s smallest Vector Graphics IP core supporting OpenVG1.1 subset....

321 0.0

Secure Storage Solution for OTP IP Synopsys Secure Storage Solution for OTP is an add-on solution to Synopsys One-Time-Programable (OTP) Non-Volatile Memory (NVM) IP, designed to addres...

322 0.0

Verification IP for DDR3 (UDIMM, RDIMM, LDIMM) ...

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Verification IP for DDR3 (UDIMM, RDIMM, LDIMM) Synopsys® VC VerificationIP for the JEDEC DDR3 memory protocol specification provides a comprehensive set of protocol, methodology, verification and p...

324 0.0

AES-GCM MACsec (IEEE 802.1AE) and FC-SP Cores Implementation of the new LAN security standard 802.1ae (MACSec) requires the NIST standard AES cipher in the GCM mode for encryption and message auth...

325 0.0

VESA DisplayPort 1.4 RX IP Subsystem for Xilinx FPGAs ...

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VESA DSC 1.2b Decoder IP Core for Xilinx FPGAs ...

327 0.0

GF 6-bit, 12 GSPS Analog to Digital Converter (ADC) IP block GlobalFoundries 22nm The A6B12G is a low-power, high-speed analog to digital converter (ADC) intellectual property (IP) design block. It is a FLASH-type ADC, with 6-bit re...

328 0.0

5GHz to 13.5GHz Phase Locked Loop (PLL) IP Block TSMC 130nm The PLL13G is a ultra-low power phase locked loop (PLL) intellectual property (IP) block. It features a very small area footprint, with exception...

329 0.0

MHL 2.0 Verification IP MHL 2.0 VIP provides a simple yet powerful user interface which drastically reduces the time and effort needed to create a verification environment an...

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PHY IP for PCIe 6.0 on TSMC N5 The multi-channel Synopsys PHY IP for PCI Express (PCIe) 6.0 meets today’s demands for higher bandwidth and power efficiency across network interface ...

331 0.0

ZIA DV500 Series - Ultra Low Power Consumption Processor IP for Deep Learning AI inference processor IP, which achieves smaller size and ultra-low power consumption by being optimized for object recognition and scene understandi...

332 0.0

ZIA DV700 Series - Configurable AI inference processor IP Configurable AI inference processor IP, which can optimize the performance and size and process all data such as images, videos, and sounds on the edg...

333 0.0

ZIA ISP- Small-size ISP IP ideal for AI camera systems Small-size ISP (Image Signal Processing) IP ideal for AI camera systems....

334 0.0

Video Sync Separator IP The Digital Blocks DB1800 Video Sync Separator IP Core extracts timing information from a standard NTSC/PAL/SECAM composite sync video signal. The DB1...

335 0.0

High Speed Access & Test IP PCIE Version High speed access for test and in-chip sensor & monitor data throughout the silicon lifecycle. Within the SiliconMAX Platform, High-Speed Access & Tes...

336 0.0

High Speed Access & Test IP USB Version High speed access for test and in-chip sensor & monitor data throughout the silicon lifecycle. Within the SiliconMAX Platform, High-Speed Access & Tes...

337 0.0

High-Performance Lossless Compression Core Lossless data compression is a class of data compression algorithms that allows the exact original data to be reconstructed from the compressed data. ...

338 0.0

MIPI C-PHY CSI-2 TX+ (Transmitter) IP in TSMC 40ULP The MXL-CPHY-2p5G-CSI-2-TX+-T-40ULP is a high-frequency low-power, low-cost, source-synchronous, physical Layer. The PHY is configured as a MIPI Maste...

339 0.0

MIPI C-PHY DSI RX (Transmitter/Host) IP in TSMC 22ULL The MXL-CPHY-2p5G-DSI-RX-T-22ULL is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificati...

340 0.0

MIPI C-PHY/D-PHY Combo CSI-2 TX (Transmitter) IP in TSMC 65LP The MXL-CDPHY-CSI-2-TX-T-65LP is a high-frequency low-power, low-cost, source-synchronous, physical Layer. The PHY is configured as a MIPI Master supp...

341 0.0

MIPI C-PHY/D-PHY Combo CSI-2 TX+ IP 3.5Gsps/2.5Gbps, 2T/2L The MXL-CDPHY-CSI-2-TX+-40LP is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification f...

342 0.0

MIPI C-PHY/D-PHY Combo CSI-2 TX+ IP in TSMC 40ULP The MXL-CDPHY-CSI-2-TX+-40ULP is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification ...

343 0.0

MIPI C-PHY/D-PHY Combo DSI RX (Receiver) IP in TSMC 28HPC+ The MXL-CDPHY-DSI-RX-T-28HPC+ is a high-frequency low-power, low-cost, source-synchronous, physical Layer. The PHY is configured as MIPI Slave support...

344 0.0

MIPI C-PHY/D-PHY Combo DSI TX (Transmitter) IP in TSMC 55G The MXL-CDPHY-DSI-TX-T-55G is a high-frequency low-power, high-performance, physical Layer. The PHY is configured as a MIPI Master supporting display ...

345 0.0

MIPI C-PHY/D-PHY Combo Universal IP in UMC 40LP The MXL-CDPHY-UNIV-U-40LP is a high-frequency low-power, low-cost, source-synchronous, physical Layer. The PHY can be configured as a MIPI Master or M...

346 0.0

MIPI D-PHY CSI-2 RX (Receiver) IP The MXL-PHY-CSI-2-RX is a high-frequency low-power, low-cost, source-synchronous, Physical Layer compliant with the MIPI Alliance Standard for D-PHY. ...

347 0.0

MIPI D-PHY CSI-2 RX+ (Receiver) IP in TSMC 28HPM The MXL-DPHY-CSI-2-RX+-T-28HPM is a high frequency low-power, low-cost, source-synchronous, Physical Layer compliant with the MIPI Alliance Standard f...

348 0.0

MIPI D-PHY CSI-2 RX+ (Receiver) IP in TSMC 40LP The MXL-DPHY-CSI-2-RX+-T-40LP is a high-frequency low-power, low-cost, source-synchronous, Physical Layer that supports the MIPI® Alliance Standard fo...

349 0.0

MIPI D-PHY CSI-2 RX+ (Receiver) IP in UMC 40ULP The MXL-DPHY-CSI-2-RX+-U-40ULP is a high-frequency low-power, low-cost, source-synchronous, Physical Layer supporting the MIPI Alliance Specification ...

350 0.0

MIPI D-PHY CSI-2 RX+ IP in TSMC 28HPC+ for Automotive Applications The MXL-DPHY-CSI-RX+-T-28HPC+ is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification ...