551 0.0

USB 3.0 PHY IP, Silicon Proven in TSMC 7FF A Universal Serial Bus (USB) transceiver is available for auxiliary devices. The PHY meets with the specifications of USB 3.0 (USB SuperSpeed), USB 2....

552 0.0

USB 3.0 PHY IP, Silicon Proven in UMC 28HPC For peripheral devices, there is a Universal Serial Bus (USB) transceiver available. The USB 3.0 (USB SuperSpeed), USB 2.0 PIPE, and UTMI standards ar...

553 0.0

USB 3.0 PHY IP, Silicon Proven in UMC 40SP A Universal Serial Bus (USB) transceiver is available for peripheral devices. The PHY complies with the USB 3.0 (USB SuperSpeed), USB 2.0 PIPE, and UT...

554 0.0

USB 3.0/ PCIe 2.0 Combo PHY IP, Silicon Proven in TSMC 28HPC+ The Combo PHY is a complete USB 3.0 and PCIe 2.0 PHY IP solution designed for a mobile and data consumer applications in TSMC 28nm process. It support...

555 0.0

USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in SAM 8LPP The unified PHY complies with the USB, USB 3.0, Serial ATA, Peripheral Component Interconnect Express (PCIe), and USB 2.0 interface protocols (USB Hig...

556 0.0

USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in SMIC 12SF++ Serial ATA (SATA) compliant with SATA 3.0 Specification, Peripheral Component Interconnect Express (PCIe) compliant with PIPE interface protocol, and ...

557 0.0

USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in SMIC 14SF+ The combination PHY is SATA (Serial ATA) compliant with SATA 3.0 Specification, PCIe (Peripheral Component Interconnect Express) compliant with PIPE i...

558 0.0

USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in SMIC 28SF The combined PHY complies with USB (USB 3.0, USB 2.0), PCIe (Peripheral Component Interconnect Express), Serial ATA (SATA 3.0 Specification), and PIPE...

559 0.0

USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in SMIC 40LL The combined PHY complies with the PIPE, Serial ATA, PCIe, USB, USB 3.0, USB 2.0, and PCIe Peripheral Component Interconnect Express interface protoco...

560 0.0

USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in SMIC 55LL The combined PHY complies with the Peripheral Component Interconnect Express (PCIe), Serial ATA, USB, USB 3.0, and USB 2.0 interface protocols (USB Hi...

561 0.0

USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in TSMC 16FFC The combo PHY consist of Peripheral Component Interconnect Express (PCIe) compliant with PCIe 2.0 Base Specification with support of PIPE interface sp...

562 0.0

USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in TSMC 22ULP The PHY combo comprises Serial ATA (SATA) compliant with SATA 3.0 Specification, Peripheral Component Interconnect Express (PCIe) compliant with PCIe ...

563 0.0

USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in TSMC 28HPC+ The combination PHY comprises of a Serial ATA (SATA) compliant with the SATA 3.0 Specification, a Peripheral Component Interconnect Express (PCIe) com...

564 0.0

USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in UMC 55SP/EF The combination PHY consists of a Serial ATA (SATA) conforming with the SATA 3.0 Specification, a Peripheral Component Interconnect Express (PCIe) com...

565 0.0

USB 3.0/ PCIe 3.0/ SATA 3.0 Combo PHY IP, Silicon Proven in SAM 8LPP The unified PHY complies with the USB, USB 3.0, Serial ATA, Peripheral Component Interconnect Express (PCIe), and USB 2.0 interface protocols (USB Hig...

566 0.0

USB 3.0/ PCIe 3.0/ SATA 3.0 Combo PHY IP, Silicon Proven in SMIC 14SF+ The combo PHY consist of Peripheral Component Interconnect Express (PCIe) compliant with PCIe 3.0 Base Specification with support of PIPE interface sp...

567 0.0

USB 3.1 Gen1 / Gen2 Device Controller IP USB 3.1 Device controller is a highly configurable core and implements the USB 3.1 Device functionality that can be interfaced with third party USB 3....

568 0.0

USB 3.1 Gen1 / Gen2 Host Controller IP USB 3.1 Host Controller is compliance with USB3.1 specification, Revision 1.0 and all associated ECN’s, USB specifications Rev 2.0 and all associated ...

569 0.0

USB 3.1 Gen1/Gen2 PHY IP, Silicon Proven in SMIC 14SF+ With this PHY IP, it supports both USB 3.1 Gen1 and Gen2. By providing an integrated self-test module, a whole on-chip physical transceiver solution w...

570 0.0

USB 3.1 Gen1/Gen2 PHY IP, Silicon Proven in UMC 28HPC It supports both USB 3.1 Gen1 and Gen2 with this PHY IP. By offering a complete on-chip physical transceiver solution with built-in jitter injection, ...

571 0.0

USB 3.1 Type-C PHY IP, Silicon Proven in SMIC 12SF++ A high performance, high-speed SERDES IP known as USB3.1Type-C PHY was created for semiconductors that allow high bandwidth data transfers while using...

572 0.0

USB 3.1 Type-C PHY IP, Silicon Proven in SMIC 14SF+ The USB3.1Type-C PHY is a high-performance, high-speed SERDES IP designed for semiconductors that support low-power, high-bandwidth data transfers. Th...

573 0.0

USB 3.1 Type-C PHY IP, Silicon Proven in SMIC 55LL The USB3.1Type-C PHY is a high-speed, SERDES IP with high performance that was created for semiconductors that allow high-bandwidth, low-power data tr...

574 0.0

USB 3.1 Type-C PHY IP, Silicon Proven in TSMC 55ULP USB3.1Type-C PHY IP is a high performance high speed SERDES IP designed for chips that perform high bandwidth data communication while operating at lo...

575 0.0

USB 3.2 Gen1/Gen2 PHY IP, Silicon Proven in TSMC 28HPC+ This PHY IP supports both USB 3.1 Gen1 & Gen2. By providing a full on-chip physical transceiver solution with Electro Static Discharge (ESD) protectio...

576 0.0

USB 3.2 Gen2 PHY IP, Silicon Proven in TSMC 12FFC All USB 3.2 Gen2X1 host and peripheral applications are supported up to 10Gbps by the USB 3.2 Gen2X1 transceiver IP. It complies with UTMI+ and PIPE4....

577 0.0

USB 3.2 Gen2 PHY IP, Silicon Proven in TSMC 16FFC The USB 3.2 Gen2X1 transceiver IP supports all USB 3.2 Gen2X1 host and peripheral applications up to 10Gbps. It conforms with the standards of UTMI+ a...

578 0.0

USB 3.2 Gen2 PHY IP, Silicon Proven in TSMC 28HPC+ All USB 3.2 Gen2X1 host and peripheral applications up to 10Gbps are supported by the USB 3.2 Gen2X1 transceiver IP. It complies with UTMI+ and PIPE4....

579 0.0

USB 3.2 Gen2 PHY IP, Silicon Proven in TSMC 7FF The USB 3.2 Gen2X1 transceiver IP offers all USB 3.2 Gen2X1 host and peripheral applications up to 10Gbps. Both the UTMI+ and PIPE4.0 specifications a...

580 0.0

USB 3.2 Gen2 PHY IP, Silicon Proven in UMC 28HPC The USB 3.2 Gen2X1 transceiver IP supports all USB 3.2 Gen2X1 host and peripheral applications up to 10Gbps. It conforms with the standards of UTMI+ a...

581 0.0

USB 3.2/ PCIe 3.1/ SATA 3.2 Combo PHY IP, Silicon Proven in UMC 28HPC The combo PHY consist of Peripheral Component Interconnect Express (PCIe) compliant with PCIe 3.1 Base Specification with support of PIPE v4.4 interfa...

582 0.0

USB-C 3.1 SS/SSP PHY, Type-C IP (Silicon proven in UMC 55SP/ EF) A high performance, high-speed SERDES IP called USB3.1Type-C PHY is created for semiconductors that provide high bandwidth data connection while using...

583 0.0

ISDB-S3-LDPC-BCH Decoder IP This design is a ISDB-S3-LDPC-BCH Decoder IP, ready to license, verified and packaged, and supplied as a portable and synthesizable Verilog IP. The sy...

584 0.0

(SDR) Software Defined Radio for high end 4G/ 5G and large MIMO application This SDR is a development platform for realization networks like 4G/5G and other radio applications involving more than 4 or 8 antenna ports. The SDR ...

585 0.0

Used for controlling HDLC/SDLC transmission protocols The DHDLC IP Core provides versatile support for a widely used HDLC transmission protocol. It manages the bit stuffing process, both address appending...

586 0.0

GSM GPRS EDGE Protocol Stack SW IP A 2.5G GSM/GPRS/EDGE SW Protocol Stack that has been integrated with multiple basebands and shiped in 1bn phones and M2M modules world wide. Extensive...

587 0.0

ISO 7816 based digital controller for integrated circuit card compliant with ETSI TS 102 221 and EMV 2000 standards Smart card controller core is compliant to ISO 7816 3 specification. The core is a technology independent, fully synchronous design. The controller fu...

588 0.0

ISO 7816 based Smart Card Reader IP The DSMART is a fast, versatile and cost-competitive core intended for smart card reader applications. It provides a communication interface with a sm...

589 0.0

FSPI Controller – XIP functionality (SINGLE, DUAL, QUAD and OCTAL SPI Bus Controller with Double Data Rate support) The FSPI is a fully configurable SINGLE, DUAL, QUAD and OCTAL SPI master/slave device, which allows user to configure polarity and phase of serial clo...

590 0.0

QSPI FLASH Controller – XIP functionality (SINGLE, DUAL and QUAD SPI Bus Controller with Double Data Rate support) The SPI is a fully configurable SINGLE, DUAL, QUAD and OCTAL SPI master/slave device, which allows user to configure polarity and phase of serial cloc...

591 0.0

1st Generation Software Defined Radio RF IP This is the 1st Generation SDR RF IP that supports 1x2 and support the frequency ranging from 300MHz to 2.8 GHz with a support of up to 40MHz Bandwidt...

592 0.0

BT DM AUDIO The Silicon chip supports BT EDR 1Mbps, 2Mbps, 3Mbps support combines the features and functions needed for all BT Audio solutions. It supports stand...

593 0.0

BT Dual Mode RF Transceiver SoC white Box IP - TSMC40 The BT Dual Mode RF IP is production proven in 40nm and has been extracted from a production BT dual Mode chip that has shipped in millions of units. ...

594 0.0

BT Dual Mode v6.0 RF PHY IP in TSMC 40nm with Channel sounding The Ultra-Low-Power DM RF transceiver IP in TSMC40 ULL is designed to meet 2.4 GHz standards like Bluetooth Classic (BR/EDR), Bluetooth Low Energy, 80...

595 0.0

Standalone controller for the Controller Area Network The DCAN is a standalone controller for the Controller Area Network (CAN), which is commonly used in automotive and industrial applications. What'...

596 0.0

LTE NB IoT/Cat M UE Low Power RF Transceiver IP 70xx is a range of ultra‐low power LTE Cat M/NB-IoT RF Transceiver IPs optimized for IoT and M2M applications. It integrates all the necessary R...

597 0.0

LTE Release-10 Baseband PHY. (L1) IP This is a 3GPP Release 10 compliant LTE eNodeB PHY IP, which is a Macro cell LTE available for commercial deployment of LTE Networks and manufacturing...

598 0.0

LTE Release-10 Baseband Protocol Stack (L2-L3) SW IP This is a 3GPP Release 10 compliant LTE eNodeB Protocol Stack SW IP, which is a Macro cell LTE available for commercial deployment of LTE Networks and...

599 0.0

LTE Release-9 UE PHY. (L1) IP The 3GPP Release 9 compliant LTE UE PHY IP is a Category 4 UE solution. The current LTE design supports 2 transmit and 2 receiver antenna ports. The U...

600 0.0

LTE Release-9 UE Protocol Stack (L2-L3) SW IP The 3GPP Release 9 compliant LTE UE Protocol Stack SW IP is a Category 4 UE solution. The current LTE design supports 2 transmit and 2 receiver antenn...