901 10.0

Chip-to-Chip IO Buffer - TSMC CLN4P Analog Bits’ Chip-to-Chip IO Buffer is a general purpose IO for medium-speed per lane transactions in ultra-short reach environments, using single-end...

902 10.0

Chip-to-Chip IO Buffer - TSMC CLN5 Analog Bits’ Chip-to-Chip IO Buffer is a general purpose IO for medium-speed per lane transactions in ultra-short reach environments, using single-end...

903 10.0

Chip-to-Chip IO Buffer - TSMC CLN5A Analog Bits’ Chip-to-Chip IO Buffer is a general purpose IO for medium-speed per lane transactions in ultra-short reach environments, using single-end...

904 10.0

Chip-to-Chip IO Buffer - TSMC CLN6FF Analog Bits’ Chip-to-Chip IO Buffer is a general purpose IO for medium-speed per lane transactions in ultra-short reach environments, using single-end...

905 10.0

Chip-to-Chip IO Buffer - TSMC CLN7FF Analog Bits’ Chip-to-Chip IO Buffer is a general purpose IO for medium-speed per lane transactions in ultra-short reach environments, using single-end...

906 10.0

Library of mathematical and floating point (FP) components Optimized for efficient hardware implementation, the Synopsys Foundation Cores include a library of mathematical and floating point (FP) components th...

907 10.0

Wide Range Frac-N/SSCG PLL - TSMC 7FF The programmable Fractional-N divider allows the PLL to lock to an incoming clock source and produce an output clock with a non-integer multiplication...

908 10.0

Wide Range Integer PLL - GLOBALFOUNDRIES 14LPP Analog Bits Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock multiplication to prog...

909 10.0

Wide Range Integer PLL - Samsung 14LPP Analog Bits Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock multiplication to prog...

910 10.0

Wide Range Integer PLL - TSMC 12 12FFC The programmable Fractional-N divider allows the PLL to lock to an incoming clock source and produce an output clock with a non-integer multiplication...

911 10.0

Wide Range Integer PLL - TSMC 16 16FFC Analog Bits Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock multiplication to prog...

912 10.0

Wide Range Integer PLL - TSMC 16 CLN16FF+GL Analog Bits Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock multiplication to prog...

913 10.0

Wide Range Integer PLL - TSMC 16 CLN16FF+LL Analog Bits Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock multiplication to prog...

914 10.0

Wide Range Integer PLL - TSMC 22 CLN22ULL/ULP Analog Bits Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock multiplication to prog...

915 10.0

Wide Range Integer PLL - TSMC 28 CLN28HPC Analog Bits Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock multiplication to prog...

916 10.0

Wide Range Integer PLL - TSMC 28 CLN28HPC+ Analog Bits Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock multiplication to prog...

917 10.0

Wide Range Integer PLL - TSMC 28 CLN28HPM Analog Bits Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock multiplication to prog...

918 10.0

Wide Range Integer PLL - TSMC 40 CLN40G Analog Bits Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock multiplication to prog...

919 10.0

Wide Range Integer PLL - TSMC 7FF Analog Bits Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock multiplication to prog...

920 10.0

Wide Range Multi-Output PLL - TSMC CLN7FF Analog Bits’ Wide Range Multi-Output PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock multipli...

921 10.0

Wide Range PLL - GLOBALFOUNDRIES 65 65G Analog Bits Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock multiplication to prog...

922 10.0

Wide Range PLL - TSMC 6FF Analog Bits’ Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock multiplication to pro...

923 10.0

Wide Range PLL - TSMC CLN3P Analog Bits’ Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de- skew and non-integer clock multiplication to p...

924 10.0

Wide Range PLL - TSMC N5 Analog Bits’ Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock multiplication to pro...

925 10.0

Wide Range Programable Integer PLL - TSMC CLN2P Analog Bits’ Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de- skew and non-integer clock multiplication to p...

926 10.0

Die-to-Die Controller IP The Synopsys Die-to-Die Controller IP, optimized for latency, bandwidth, power and area, enables efficient inter-die connectivity in server, AI accele...

927 10.0

Die-to-Die, 112G Ultra-Extra Short Reach PHY in GF (12nm) The Synopsys XSR PHY IP for 112Gbps per lane die-to-die connectivity enables high-bandwidth ultra and extra short reach interfaces in multi-chip modul...

928 10.0

Die-to-Die, 112G Ultra-Extra Short Reach PHY in TSMC (12nm, N7, N6, N5) The Synopsys XSR PHY IP for 112Gbps per lane die-to-die connectivity enables high-bandwidth ultra and extra short reach interfaces in multi-chip modul...

929 10.0

Differential Clock Receiver - TSMC CLN2P Analog Bits’ Differential Clock Receiver macro addresses a large portfolio of applications. The Receiver is designed for digital logic processes and u...

930 10.0

Differential Clock Receiver - TSMC CLN3A Analog Bits’ Differential Clock Receiver macro addresses a large portfolio of applications. The Receiver is designed for digital logic processes and u...

931 10.0

Differential Clock Receiver - TSMC CLN3E Analog Bits’ Differential Clock Receiver macro addresses a large portfolio of applications. The Receiver is designed for digital logic processes and u...

932 10.0

Differential Clock Receiver to CML - TSMC CLN2P Analog Bits’ Differential Clock Receiver to CML macro is a receiver including on-chip termination, and addresses a large portfolio of applications req...

933 10.0

Differential Clock Receiver to CML - TSMC CLN3A Analog Bits’ Differential Clock Receiver to CML macro is a receiver including on-chip termination, and addresses a large portfolio of applications req...

934 10.0

Differential Clock Receiver to CML - TSMC CLN3E Analog Bits’ Differential Clock Receiver to CML macro is a receiver including on-chip termination, and addresses a large portfolio of applications req...

935 10.0

Differential Clock Receiver to CML - TSMC CLN6FF Analog Bits’ Differential Clock Receiver to CML macro is a receiver including on-chip termination, and addresses a large portfolio of applications req...

936 10.0

Differential Clock Reciever - TSMC CLN3P Analog Bits’ Differential Clock Receiver macro addresses a large portfolio of applications. The Receiver is designed for digital logic processes and u...

937 10.0

Differential Clock Reciever to CML - TSMC CLN3P Analog Bits’ Differential Clock Receiver to CML macro is a receiver including on-chip termination, and addresses a large portfolio of applications req...

938 10.0

Differential Output Buffer - TSMC CLN3P Analog Bits’ Differential Output Driver macros provide a low noise, high performance differential output clock. The output driver design implements a...

939 10.0

Differential Output Buffer - TSMC 6FF Analog Bits’ Differential Output Driver macros provide a low noise, high performance differential output clock. The output driver design implements a ...

940 10.0

Differential Output Buffer - TSMC CLN3E Analog Bits’ Differential Output Driver macros provide a low noise, high performance differential output clock. The output driver design implements a ...

941 10.0

Differential Output Buffer - TSMC CLN3P Analog Bits’ Differential Output Driver macros provide a low noise, high performance differential output clock. The output driver design implements a ...

942 10.0

Differential Output Buffer - TSMC CLN4P Analog Bits’ Differential Output Driver macros provide a low noise, high performance differential output clock. The output driver design implements a ...

943 10.0

Differential Output Buffer - TSMC N5 Analog Bits’ Differential Output Driver macros provide a low noise, high performance differential output clock. The output driver design implements a ...

944 10.0

Differential Output Driver - TSMC CLN2P Analog Bits’ Differential Output Driver macros provide a low noise, high performance differential output clock. The output driver design implements a ...

945 10.0

Differential Receiver - TSMC 7FF Analog Bits Differential Signal Receiver macro is a receiver including on-chip termination, and addresses a large portfolio of applications. The Recei...

946 10.0

Differential Signal Receiver - TSMC 6FF Analog Bits Differential Signal Receiver macro is a receiver including on-chip termination, and addresses a large portfolio of applications. The Recei...

947 10.0

Differential Signal Receiver - TSMC N5 Analog Bits Differential Signal Receiver macro is a receiver including on-chip termination, and addresses a large portfolio of applications. The Recei...

948 10.0

High Performance 1-22.5G PCIe4/SAS4 PHY - TSMC 16FFC Analog Bits Programmable SERDES provides a Physical Media Attachment (PMA) Layer capable of signaling at multiple data rates and supports multi-protoc...

949 10.0

High Performance 20GHz C2C PLL - TSMC CLN3A Analog Bits’ High Speed PLL creates a high speed clock with good duty cycle and jitter characteristics useful for high speed, source synchronous inter...

950 10.0

High Performance 20GHz C2C PLL - TSMC CLN3E Analog Bits’ High Speed PLL creates a high speed clock with good duty cycle and jitter characteristics useful for high speed, source synchronous inter...