251 70.0

LPDDR5X/5/4X/4 Memory Controller IP OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...

252 70.0

xSPI NOR Flash controller xSPI-NFC is JEDEC xSPI compliant NOR Flash controller IP supporting devices from various vendors with XIP and Auto-boot support. The IP also has Conti...

253 70.0

Multi-protocol wireless plaform integrating Bluetooth Dual Mode, IEEE 802.15.4 (for Thread, Zigbee and Matter) Ceva-Waves Links is a versatile family of multi-protocol wireless platform IPs, encompassing the latest consumer wireless standards. It leverages the ...

254 60.0

WAVE637DV, AV1, H.265, HEVC, H.264, AVC, VP9 video codec IP for 4K WAVE637DV is a 4K multi-standard video codec HW IP that supports AV1, HEVC/H.265, AVC/H.264, and VP9 video codec standard. It provides 4K60fps@500MHz ...

255 60.0

MIPI I3C PHY - TSMC (12nm, 7nm, 5nm, and 22nm) - GF 12nm The I3C bus (incl. PHY) is used for various sensors in the mobile/automotive system where the Host transfers data and control between itself and vario...

256 60.0

Modern Audio DSP, designed for battery operated, high-performance, audio and voice applications Ceva-BX1 inherent low power design and compact code size make it ideal for a broad range of advanced audio/voice applications, requiring signal proces...

257 60.0

Turnkey UWB MAC and PHY platform IP, for FiRa 2.0, CCC Digital Key 3.0, and Radar Ceva-Waves UWB is a low power ultra-wideband (UWB) MAC and PHY platform IP based on 802.15.4 HRP, the FiRa Consortium and the Car Connectivity Consort...

258 52.0

MIPI C-PHY/D-PHY Combo CSI-2 TX+ IP 3.5Gsps/2.5Gbps The MXL-CDPHY-3p5G-CSI-2-TX+-40LP is a high-frequency, low-power, low-cost, source synchronous, physical Layer supporting the MIPI Alliance Specificat...

259 52.0

MIPI C-PHY/D-PHY Combo DSI RX+ IP (4.5Gsps/trio, 6.5Gbps/lane) in TSMC 16FFC The MXL-CD-PHY-DSIRX+-T-16FFC is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification ...

260 52.0

MIPI D-PHY CSI-2 RX (Receiver) in GlobalFoundries 22FDX The MXL-DPHY-CSI-2-RX-GF-22FDX is a high-frequency low-power, low-cost, source-synchronous, Physical Layer supporting the MIPI Alliance Specification ...

261 52.0

MIPI D-PHY DSI RX (Receiver) in GlobalFoundries 22FDX The MXL-DPHY-DSI-RX-GF-22FDX is a high-frequency, low-power, low-cost, source-synchronous, physical layer supporting the MIPI Alliance Specification f...

262 52.0

PVT - Process, Voltage, and Temperature Monitor TSMC 7nm The ODT-PVT-ULP-001C-7T is an ultra-low power temperature, voltage and process monitor designed in a 7nm CMOS process. This IP operates over the entir...

263 50.0

40G UCIe PHY for high-density advanced packages Synopsys UCIe PHY IP enables high-bandwidth, low-power, and low-latency die-to-die connectivity in a multi-die package for hyperscale data center, AI,...

264 50.0

40G UCIe PHY for organic substrate standard packages Synopsys UCIe PHY IP enables high-bandwidth, low-power, and low-latency die-to-die connectivity in a multi-die package for hyperscale data center, AI,...

265 50.0

12-bit, 9 GSPS High Performance Swift™ DAC in 16nm CMOS The ODT-DAC-12B9G-16 is a high performance current steering 12-bit 9GSPS DAC on 16nm CMOS process that operates at an update rate of up to 9GSPS. The ...

266 50.0

12-bit, 9.2 GSPS Analog-to-Digital Converter (ADC) GlobalFoundries 22nm The A12B9G is a low-power, high-speed analog to digital converter (ADC) intellectual property (IP) design block. It is a time-interleaved successive a...

267 50.0

32G PHY in TSMC (16nm, 12nm, N7, N6, N6C, N5, N5A, N4C, N3E, N3P,N2P) The multi-lane Synopsys Multi-Protocol 32G PHY IP is part of Synopsys’ high-performance multi-rate transceiver portfolio for high-end networking and ...

268 50.0

I3C Host Controller The MIPI I3C interface is an evolutionary standard that improves upon the features of I2C, while maintaining backward compatibility. This standard off...

269 50.0

56G Ethernet PHY in TSMC (16nm, 12nm) The complete silicon-proven Synopsys IP solution, consisting of configurable digital controllers, PHYs, Integrity and Data Encryption (IDE) Security M...

270 50.0

CAN 2.0B Bus Controller IP Core The Controller Area Network (CAN) controller IP that implements the CAN2.0A, CAN2.0B as well as newer high performance Non ISO CAN-FD protocols. It ca...

271 50.0

WAVE-J, 8-bit, 12-bit JPEG Codec IP upto 64Kx64K New! Chips&Media WAVE-J is a standalone and high-performance JPEG codec IP that can perform JPEG Baseline/Extended and MJPEG decoding and encoding. Com...

272 50.0

WAVE517, AV1, H.265, HEVC, H.264, AVC, VP9, AVS2 video decoder IP for 4K The world-leading hardware IP provider, Chips&Media, pre-released the multi-standard HW IP named WAVE517, targeting 4K ultra-high-definition (UHD), wh...

273 50.0

WAVE521C, H.265, HEVC, H.264, AVC video codec IP for 4K WAVE521C is a 4K multi-format codec IP to support both HEVC/H.265 and AVC/H.264 video standards. This IP core provides real-time performance for encod...

274 50.0

WAVE627, AV1, H.265, HEVC, H.264, AVC, video encoder IP for 4K WAVE627 is a 4K multi-standard video encoder HW IP that supports AV1, HEVC/H.265, and AVC/H.264 video codec standards. It provides 4K60fps@500MHz real...

275 50.0

WAVE633, H.265, HEVC, H.264, AVC, video codec IP for 4K WAVE633 is a 4K multi-standard video codec HW IP that supports HEVC/H.265 and AVC/H.264 video codec standard. It provides 4K60fps@500MHz real-time enc...

276 50.0

HBM3 PHY V2 in TSMC (N5, N4P, N3E) The Synopsys HBM3 PHY is a complete physical layer IP interface (PHY) solution for high-performance computing (HPC), AI, graphics, and networking ASIC...

277 50.0

PCIe 4.0 PHY in TSMC (28nm, 16nm, 12nm, N7, N3P, N2P) The multi-channel Synopsys PHY IP for PCI Express® 4.0 includes Synopsys’ high-speed, high-performance transceiver to meet today’s applications’ deman...

278 50.0

PCIe 5.0 PHY in TSMC (16nm, 12nm, N7, N6, N6C, N5, N4P, N4C, N3E, N3P, N2P) The multi-channel Synopsys PHY IP for PCI Express® 5.0 and CXL includes Synopsys’ high-speed, high-performance transceiver to meet today’s applicatio...

279 50.0

PCIe Gen3 to SRIO Gen3 Bridge (FPGA) Mobiveil’s PCIe Gen3 to SRIO Gen3 Bridge is a high-performance FPGA-based protocol conversion IP that enables seamless communication between PCI Expre...

280 50.0

PCIe Gen5 NVMe SSD RAMDISK Reference Platform Mobiveil’s RAMDISK-Gen5is a PCIe Gen5 and 1.4 NVMe compliant Ramdisk that emulates the next generation NVMe Gen5 SSDs with high performance. With hi...

281 50.0

SD 3.0 / SDIO 3.0 / eMMC 5.0 Host Controller Arasan Chip Systems’ eMMC 5.0 / SD3.0 Host Controller IP (3MCR) is a highly integrated host controller IP solution that supports three key memory and ...

282 50.0

HDMI 2.1 Tx PHY in TSMC (16nm, 12nm, N7, N6, N6C, N4, N3E) The Synopsys HDMI 2.1 TX Controller and PHY IP solutions,compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide the...

283 50.0

HDMI 2.1/DisplayPort 2.1 TX PHY in TSMC (N3E, N3P) The Synopsys HDMI 2.1 TX Controller and PHY IP solutions,compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide the...

284 50.0

DDR5 PHY in TSMC (N5, N4P, N3P, N3E) The Synopsys DDR5/4 PHY is a complete physical layer IP interface (PHY) solution for ASIC, ASSP, and system-on-chip (SoC) applications requiring high-...

285 50.0

Ceva-Waves Bluetooth 5.4 dual mode Baseband Controller Ceva-Waves Bluetooth 5.4 dual mode IP is a complete and flexible solution for integration into SoCs/ASSPs. It contains both "classic" BR/EDR Bluetoot...

286 50.0

Ceva-Waves Bluetooth 6.0 dual mode Baseband Controller Ceva-Waves Bluetooth dual mode IP is a complete and flexible solution for integration into SoCs/ASSPs. It has been qualified for Bluetooth Core Specif...

287 50.0

UFS 4.0 Host Controller compatible with M-PHY 5.0 and UniPro 2.0 The Arasan UFS Host -UniPro IP is a simple, high performance, serial interface used primarily in mobile systems between host processing and NVM mass s...

288 50.0

5G Baseband Platform IP for Mobile Broadband and IoT PentaG2™ is Ceva’s second generation 5G NR baseband modem IP platform. It is the industry’s only platform offering capable of meeting the extreme perf...

289 50.0

AHB Octal SPI Controller with PSRAM and XIP Support The Silvaco Octal SPI Memory Controller IP core is a serial peripheral interface (SPI) master which controls an external serial device, usually an ind...

290 50.0

High Performance DDR5/4/3 Memory Controller Mobiveil's DDR5/4/3 Memory Controller is a highly flexible and configurable design targeted for high performance enterprise server and real-time consu...

291 50.0

MIPI C-PHY v1.0 D-PHY v1.2 TX 2 trios/2 Lanes in TSMC (12nm, N5, N3P) Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

292 50.0

MIPI C-PHY v1.0 D-PHY v1.2 TX 3 trios/4 Lanes in TSMC (16nm, 12nm, N7, N6, N5, N3P) Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

293 50.0

MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (16nm, 12nm, N7, N6, N5, N4, N4P, N3E, N3P) Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

294 50.0

MIPI C-PHY v2.0 D-PHY v2.1 RX 2 trios/2 Lanes in TSMC (N7, N6, N5, N4, N4C, N3E, N3P) Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

295 50.0

MIPI C-PHY v2.0 D-PHY v2.1 RX 3 trios/4 Lanes in TSMC (N6, N6C, N5, N4P, N4C, N3) Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

296 50.0

MIPI D-PHY Universal Tx / Rx v1.1 @1.5ghz Ultra Low Power for IoT & Wearables Arasan 2nd Generation MIPI D-PHY v1.1 IP supporting speeds of up to 1.5 Gbps on TSMC 22nm process technology for SoC designs. Arasan’s D-PHY IP is ava...

297 50.0

MIPI DSI-2 Receiver Controller v1.0 The Arasan DSI-2 Device Controller IP is designed to provide MIPI DSI-2 1.0 compliant high speed serial connectivity for mobile display modules with T...

298 50.0

MIPI M-PHY - TSMC 40nm MIPI M-PHY Specification Version 3.0 is a low pin count, power efficient, inter-chip serial interface with high bandwidth capabilities. A M-PHY config...

299 50.0

MIPI M-PHY G4 Type 1 2Tx2RX in TSMC (16nm, 12nm, N7, N6, N5, N4, N3A, N3E) The silicon-proven Synopsys MIPI® M-PHY IP, compliant with the latest MIPI M-PHY v5.0 specification, supports speeds up to 23.32 Gbps per lane. The I...

300 50.0

Ultra High-Speed Cache Memory Compiler Silvaco’s Ultra High-Speed cache memory is an adaptable, independent, non-coherent cache Intellectual Property (IP) featuring an advanced cache ar...