Design & Reuse
5377 IP
3801
0.0
MIPI RFFE 1.0 Verification IP
MIPI-RFFE 1.0 VIP is developed using UVM technology. This VIP can be used as Master and Slave to verify Slave IP and Master IP respectively. It can al...
3802
0.0
MIPI Soundwire PHY
The physical layer block implements all the line-side functions such as NRZI encoding & decoding, bus clash detection, data line buffer enable/disable...
3803
0.0
MIPI SPMI 2.0 Device IP
Arasan’s SPMI Device IP (Configurable Controller Cores) implements MIPI SPMI2.0 protocols. It is designed to be configured as a SPMI Host, SPMI Device...
3804
0.0
MIPI SPMI 2.0 Host IP
Arasan’s SPMI Host IP (Configurable Controller Cores) implements MIPI SPMI2.0 protocols. It is designed to be configured as a SPMI Host, SPMI Device C...
3805
0.0
MIPI® CSI -2 OVM 2.0 Class based Verification IP
MIPI Specifications establish standards for hardware and software interfaces between the processors and peripherals typically found in mobile terminal...
3806
0.0
MIPI® DSI VMM based Verification IP
The VMM 1.0 based MIPI® DSI Verification IP (VIP) is compliant to the DSI MIPI Specification for Display Serial Interface Version 1.00 and DRAFT MIPI ...
3807
0.0
MIPI® HSI VMM based Verification IP
The MIPI HSI VIP is an interface between an applications processor and cellular modem. It can be used to verify both Transmitter and/or Receiver of MI...
3808
0.0
FireCode FEC
Zero latency, asynchronous, low power , low gate count FireCode FEC. It detects and corrects 11 bits of burst errors in 2112 bits of received codew...
3809
0.0
RISC-V high performance CPU
Ventana s first generation RISC-V high performance CPU is targeted at data center, edge, and other general computing applications. The configurable CP...
3810
0.0
RISC-V processor with vector extension certified for ISO 26262 ASIL D ready
Off-loading heavy calculations from microcontrollers The DR1000C is a parallel processor IP that is ideal for offloading high-load arithmetic process...
3811
0.0
Display Stream Compression (DSC 1.2) Decoder
The Trilinear Technologies Display Stream Compression (DSC) Decoder core offers realtime decompression of high-definition streams with resolutions fro...
3812
0.0
Display Stream Compression (DSC 1.2) Encoder
The Trilinear Technologies Display Stream Compression (DSC) Encoder offers real-time compression of high-definition streams with resolutions up to 8K....
3813
0.0
DisplayPort 1.4 Transmitter Link Controller
Continuing the highly successful line of DisplayPort link controller cores, the Trilinear VF-111T DisplayPort Transmitter core has been updated to inc...
3814
0.0
DisplayPort Receiver Link Controller
Our 5th generation DisplayPort Receiver Link Controller core supports DisplayPort 1.4, 2.0 and embedded DisplayPort 1.4b features, including link rate...
3815
0.0
DisplayPort Transmitter Link Controller
Our 5th generation DisplayPort Transmitter Link Controller core supports DisplayPort 1.4, 2.0 and embedded DisplayPort 1.4b features, including link r...
3816
0.0
VisualSim AI Evaluator
VisualSim AI Evaluator is an AI evaluator that combines analog, digital, power and network modeling to select the right architecture for the accelerat...
3817
0.0
VisualSim Artificial Intelligence (AI)-driven Processor Generator
VisualSim Processor Generator is a revolutionary and extremely intelligent library. The library contains the generators and a large set of pre-define...
3818
0.0
VisualSim Explorer
VisualSim Explorer is a Web Server that enables models to be embedded in documents for viewing, simulation and analysis from within a Web Browser with...
3819
0.0
BitBLT Graphics Hardware Accelerator (AXI4 Bus)
The Digital Blocks DB9100AXI4 BitBLT Graphics Hardware Accelerator Verilog IP Core renders a graphics frame by generating new bitmaps from commands to...
3820
0.0
BitBLT Graphics Hardware Accelerator Engine
The DB9100 BitBLT 2D Graphics Engine IP Core (Verilog Cores DB9100AXI4, DB9100AXI, DB9100AHB, DB9100AVLN) reads graphics command sets originated by th...
3821
0.0
Mixel, Inc.- Mixed-signal IP
Mixel is focused on providing intellectual property cores and design services in the mixed-signal IC area. Mission Statement Provide our custom...
3822
0.0
All Digital Phase Locked Loop
The iniADPLL is an all digital implementation of a phase locked loop. Plls are widely used in telecom applications for clock recovery, clock generatio...
3823
0.0
Floating point adder
Floating point adder...
3824
0.0
Floating point MAC
Floating point MAC...
3825
0.0
Floating point multiplier
Floating point multiplier...
3826
0.0
Globalfoundries 12nm MIPI D-PHY Rx only V1.2@2.5GHz
Arasan Chip Systems standalone MIPI D-PHY(SM) Recieve (Rx) only for Globalfoundries 12nm FinFET process nodes. Arasan's standalone D-PHY Rx only for...
3827
0.0
Globalfoundries 12nm MIPI D-PHY Tx only V1.2@2.5GHz
Arasan Chip Systems standalone MIPI D-PHY(SM) Transmit only for Globalfoundries 12nm FinFET process nodes. Arasan's standalone D-PHY Tx only for Glo...
3828
0.0
Globalfoundries 22nm MIPI D-PHY Rx only V1.2@2.5GHz
Arasan Chip Systems standalone MIPI D-PHY(SM) Recieve (Rx) only for Globalfoundries 22nm FinFET process nodes. Arasan's standalone D-PHY Rx only for...
3829
0.0
Globalfoundries 22nm MIPI D-PHY Rx only V1.1@1.5GHz
Arasan 2nd Generation MIPI D-PHY v1.1 Rx IP supporting speeds of up to 1.5 Gbps on GF 22nm process technology for SoC designs. Arasan’s D-PHY IP is av...
3830
0.0
Globalfoundries 22nm MIPI D-PHY Tx only V1.2@2.5GHz
Arasan Chip Systems standalone MIPI D-PHY(SM) Transmit only for Globalfoundries 22nm FinFET process nodes. Arasan's standalone D-PHY Tx only for Glo...
3831
0.0
Globalfoundries 22nm MIPI D-PHY Tx only V1.1@1.5GHz
Arasan 2nd Generation MIPI D-PHY v1.1 Tx IP supporting speeds of up to 1.5 Gbps on GF 22nm process technology for SoC designs. Arasan’s D-PHY IP is av...
3832
0.0
Globalfoundries 22nm MIPI D-PHY Universal Tx-Rx V1.1@1.5GHz
Arasan 2nd Generation MIPI D-PHY v1.1 IP supporting speeds of up to 1.5 Gbps on GF 22nm process technology for SoC designs. Arasan’s D-PHY IP is avail...
3833
0.0
Globalfoundries 22nm MIPI D-PHY Universal Tx-Rx V1.2 @ 2.5GHz
Arasan Chip Systems announces the immediate availability of its MIPI D-PHY(SM) Globalfoundries 22nm FinFET process nodes. Arasan's D-PHY Global Foun...
3834
0.0
Clock Delay Monitor IP
Synopsys’ Clock and Delay Monitor (CDM) is a small IP capable of performing on-chip measurements, monitoring, and safety operations. It can be embedde...
3835
0.0
Clock/Data Recovery PLL
The MXL-PLL-CDR is a clock/data recovery PLL implemented using a digital CMOS process. It is highly integrated and require no external components. Dif...
3836
0.0
Alphacore ASIC Design Services
The Alphacore ASIC design team has extensive experience in delivering complete low power, high speed analog mixed signal, imaging, power management, a...
3837
0.0
Ultra Accelerator Link(UALink) Controller
Full-stack, scalable, configurable UALink Transaction Layer (TL), Data Link Layer (DL), and Physical Layer (PL), interconnect IP for next-generation A...
3838
0.0
Ultra High Density, 5-track, 3nm channel length, 48nm poly pitch TSMC 2nm Plus
Ultra High Density, 5-track, 3nm channel length, 48nm poly pitch TSMC 2nm Plus...
3839
0.0
Ultra High Density, 6-track, 3nm channel length, 48nm poly pitch TSMC 2nm Plus
Ultra High Density, 6-track, 3nm channel length, 48nm poly pitch TSMC 2nm Plus...
3840
0.0
Ultra Low Power Edge AI Processor
DMP AI processor IP, ZIA™ DV740, is the ultra low power consumption processor IP for Deep Learning on edge side specialized on inference processing. Z...
3841
0.0
Ultra Low-Latency IP PCI-express Framework
LeWiz makes available its low-latency PCI-express framework for IP licensing - targeting low-latency applications such as those in the financial secto...
3842
0.0
Bluetooth 5.2 / 5.1 / 5.0 / 4.2 LE Controller with Link Layer and optional 802.15.4 MAC
Packetcraft's Bluetooth 5.2 / 5.1 / 5.0 / 4.2 Low Energy Controller IP, (PC-BLE-C5.2), is a highly optimized, comprehensive and flexible solution for ...
3843
0.0
Bluetooth 5.x Low Energy (BLE) RF Transceiver
Orca’s ultra-low power Bluetooth low energy RF transceiver and modem is a best-in-class Bluetooth 5 low energy design for battery-powered IoT and M2M ...
3844
0.0
DMA AXI4-Stream Interface to AXI Memory Map Address Space
Digital Blocks DB-AXI4-STREAM-TO-AXI4-MM-BRIDGE Verilog RTL IP Core accepts AXI4-Stream data and control input, converts the control TID to a AXI4 Mem...
3845
0.0
CMAC and XCBC AES Core
The CMAC1 core provides implementation of cryptographic hashes AES-CMAC per NIST SP 800-38B and AES-XCBC. The cores utilize “flow-through” design that...
3846
0.0
Small and Fast Security Solutions for Critical Automotive Applications
Today's vehicles are equipped with multiple microcontrollers that control critical safety and performance functions in a vehicle. When considering...
3847
0.0
AMBA AHB to APB Bus Bridge Core
The AHB2APB implements an AHB to APB bus bridge, allowing the connection of peripherals with an APB interface to an AHB bus. The highly-configurable...
3848
0.0
AMBA AHB Verification IP
AMBA AHB VIP can be configured as Master, Slave and AHB bus and allows Module & System level verification. AMBA AHB VIP is a readymade highly configur...
3849
0.0
AMBA AXI 4.0 Verification IP
eInfochips’ AXI 4.0 Verification IP Product is the Industry’s most comprehensive protocol validation solution for predictable verification of AMBA AXI...
3850
0.0
UMC L110AELL 110nm Clock Generator PLL - 120MHz-600MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...