451 20.0

HDMI 2.1 eARC Tx PHY in Samsung (14nm) The Synopsys HDMI 2.1 RX Controller and PHY IP solutions, compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide th...

452 20.0

HDMI 2.1 eARC TX PHY in TSMC (16nm, 12nm) The Synopsys HDMI 2.1 RX Controller and PHY IP solutions, compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide th...

453 20.0

HDMI 2.1 Rx PHY 12Gbps in Samsung (14nm) The Synopsys HDMI 2.1 RX Controller and PHY IP solutions, compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide th...

454 20.0

HDMI 2.1 RX PHY 12Gbps in TSMC (16nm, 12nm) The Synopsys HDMI 2.1 RX Controller and PHY IP solutions, compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide th...

455 20.0

HDMI 2.1 Tx PHY in GF (12nm) The Synopsys HDMI 2.1 TX Controller and PHY IP solutions,compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide the...

456 20.0

HDMI 2.1 Tx PHY in Samsung (14nm) The Synopsys HDMI 2.1 TX Controller and PHY IP solutions,compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide the...

457 20.0

FEC As serial link speeds have increased, the reach achievable has become more and more limited by the lossy nature of the physical media which introduces...

458 20.0

Temperature Sensor Deep NWELL, TSMC N3EP A high precision low power junction temperature sensor that has been developed to be easily embedded into digital ASIC designs. The block features an ...

459 20.0

VESA VDC-M V1.2 Decoder Embrace the future of digital media with Arasan's VESA VDC-M v1.2 Decoder. Our groundbreaking product revolutionizes video compression technology, off...

460 20.0

VESA VDC-M Decoder The Video Electronics Standards Association (VESA®) introduced the VESA Display Compression-M (VDC-M) standard, a new display interface compression st...

461 20.0

GF 6-bit, 10 GSPS Analog to Digital Converter (ADC) IP block GlobalFoundries 22nm The A6B10G is a low-power, high-speed analog to digital converter (ADC) intellectual property (IP) design block. It is a flash-type ADC, with 6-bit re...

462 20.0

High Performance HBM, HBM3 Memory Controller OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...

463 20.0

High-Performance AES-GCM/CTR IP The compact, high-performance Synopsys Pipelined AES-GCM/CTR Core implements the AES-GCM/CTR algorithm as specified in the National Institute of Stand...

464 20.0

High-Performance AES-XTS/ECB IP Memory and storage security involves protecting storage resources and the data stored on them, both on-premises and in external data centers and the c...

465 20.0

MIPI C-PHY v1.0 D-PHY v1.2 RX 2 trios/2 Lanes in TSMC (12nm, N5) Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

466 20.0

MIPI C-PHY v1.0 D-PHY v1.2 RX 3 trios/4 Lanes in TSMC (16nm, 12nm, N7, N6, N5) Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

467 20.0

MIPI C-PHY v1.2 D-PHY v2.1 RX 2 trios/2 Lanes in TSMC (16nm, N6, N6C, N5) Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

468 20.0

MIPI C-PHY v1.2 D-PHY v2.1 RX 3 trios/4 Lanes in TSMC (16nm, 12nm, N7, N6, N5, N3P) Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

469 20.0

MIPI C-PHY v1.2 D-PHY v2.1 TX 2 trios/2 Lanes in TSMC (16nm, 12nm, N5) Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

470 20.0

MIPI CSI-2 host/device controllers for high-speed serial interface between image processor and camera sensors Synopsys MIPI® IP solution enables low-power and high-performance interface between system-on-chips (SoCs), application processors, baseband processor...

471 20.0

MIPI CSI-2 Tansmitter v 1.3, C-PHY compatible The MIPI Camera Serial Interface (CSI-2) Transmitter, typically resides in a mobile platform’s camera module, and communicates over a D-PHY/C-PHY link...

472 20.0

MIPI D-PHY ( DPHY ) 1.2 RX Silicon Library's MIPI D-PHY ( DPHY ) 1.2 RX PHY IP supports data rates up to 1.5Gbps. This IP includes two PLLs. This silicon proven IP is available...

473 20.0

MIPI D-PHY ( DPHY ) 1.2 TX Silicon Library's MIPI D-PHY ( DPHY ) 1.2 TX PHY IP supports data rates up to 1.5Gbps and 2.5Gbps per lane (in HS), depending on the technology node. ...

474 20.0

MIPI D-PHY Bidirectional 2 Lanes in GF (40nm, 28nm, 22nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

475 20.0

MIPI D-PHY Bidirectional 2 Lanes in SMIC (40nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

476 20.0

MIPI D-PHY Bidirectional 2 Lanes in TSMC (40nm, 28nm, 16nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

477 20.0

MIPI D-PHY Bidirectional 4 Lanes in Fujitsu (40nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

478 20.0

MIPI D-PHY Bidirectional 4 Lanes in GF (40nm, 28nm, 22nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

479 20.0

MIPI D-PHY Bidirectional 4 Lanes in SMIC (40nm, 28nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

480 20.0

MIPI D-PHY Bidirectional 4 Lanes in TSMC (40nm, 28nm, 16nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

481 20.0

MIPI D-PHY Rx-Only 2 Lanes in GF (28nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

482 20.0

MIPI D-PHY Rx-Only 2 Lanes in SMIC (40nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

483 20.0

MIPI D-PHY Rx-Only 2 Lanes in TSMC (40nm, 28nm, 22nm, 16nm, 12nm, N7, N6) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

484 20.0

MIPI D-PHY Rx-Only 2 Lanes in UMC (28nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

485 20.0

MIPI D-PHY Rx-Only 4 Lanes in GF (28nm, 12nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

486 20.0

MIPI D-PHY Rx-Only 4 Lanes in SMIC (40nm, 28nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

487 20.0

MIPI D-PHY Rx-Only 4 Lanes in TSMC (40nm, 28nm, 22nm, 16nm, 12nm, N7, N6) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

488 20.0

MIPI D-PHY Rx-Only 4 Lanes in UMC (28nm, 22nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

489 20.0

MIPI D-PHY Tx-Only 2 Lanes in TSMC (28nm, 22nm, 16nm, 12nm, N7, N6) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

490 20.0

MIPI D-PHY Tx-Only 4 Lanes in GF (12nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

491 20.0

MIPI D-PHY Tx-Only 4 Lanes in SMIC (28nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

492 20.0

MIPI D-PHY Tx-Only 4 Lanes in TSMC (28nm, 22nm, 16nm, 12nm, N7, N6, N6C) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

493 20.0

MIPI D-PHY Tx-Only 4 Lanes in UMC (28nm, 22nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

494 20.0

MIPI DSI-2 controllers with VESA DSC for high-speed serial interface between application processor and displays Synopsys MIPI® IP solution enables low-power and high-performance interface between system-on-chips (SoCs), application processors, baseband processor...

495 20.0

MIPI DSI-2 host/device controllers for high-speed serial interface between application processor and displays Synopsys MIPI® IP solution enables low-power and high-performance interface between system-on-chips (SoCs), application processors, baseband processor...

496 20.0

MIPI I3C controller delivers high bandwidth and scalability for integration of multiple sensors Synopsys MIPI® IP solution enables low-power and high-performance interface between system-on-chips (SoCs), application processors, baseband processor...

497 20.0

MIPI M-PHY G4 Type 1 1Tx1RX in TSMC (16nm, 12nm, N5) The silicon-proven Synopsys MIPI® M-PHY IP, compliant with the latest MIPI M-PHY v5.0 specification, supports speeds up to 23.32 Gbps per lane. The I...

498 20.0

MIPI M-PHY G4 Type 1 2TX2RX in GF (12nm) The silicon-proven Synopsys MIPI® M-PHY IP, compliant with the latest MIPI M-PHY v5.0 specification, supports speeds up to 23.32 Gbps per lane. The I...

499 20.0

MIPI M-PHY G5 Type 1 2Tx2Rx in Samsung (14nm) The silicon-proven Synopsys MIPI® M-PHY IP, compliant with the latest MIPI M-PHY v5.0 specification, supports speeds up to 23.32 Gbps per lane. The I...

500 20.0

MIPI UniPro IP for reliable, high-performance and low power link between devices in mobile devices Synopsys MIPI® IP solution enables low-power and high-performance interface between system-on-chips (SoCs), application processors, baseband processor...