Sansa Security, Inc. (now ARM Holdings) IP Cores

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Complete datasheets for Sansa Security, Inc. (now ARM Holdings) IP Core products
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2051

1.0

TSMC CLN28HPL 28nm DDR DLL - 246MHz-1230MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2052

1.0

TSMC CLN28HPL 28nm Deskew PLL - 110MHz-550MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2053

1.0

TSMC CLN28HPL 28nm Deskew PLL - 220MHz-1100MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2054

1.0

TSMC CLN28HPL 28nm Deskew PLL - 440MHz-2200MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2055

1.0

TSMC CLN28HPL 28nm General Purpose PLL - 220MHz-1100MHz

The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...

2056

1.0

TSMC CLN28HPL 28nm Multi Phase DLL - 110MHz-550MHz

The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

2057

1.0

TSMC CLN28HPL 28nm Multi Phase DLL - 220MHz-1100MHz

The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

2058

1.0

TSMC CLN28HPL 28nm Multi Phase DLL - 440MHz-2200MHz

The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

2059

1.0

TSMC CLN28HPL 28nm Spread Spectrum PLL - 192MHz-962MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2060

1.0

TSMC CLN28HPL 28nm Spread Spectrum PLL - 384MHz-1920MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2061

1.0

TSMC CLN28HPL 28nm Spread Spectrum PLL - 96MHz-481MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2062

1.0

TSMC CLN28HPM 28nm Clock Generator PLL - 175MHz-875MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2063

1.0

TSMC CLN28HPM 28nm Clock Generator PLL - 350MHz-1750MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2064

1.0

TSMC CLN28HPM 28nm Clock Generator PLL - 700MHz-3500MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2065

1.0

TSMC CLN28HPM 28nm DDR DLL - 150MHz-750MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2066

1.0

TSMC CLN28HPM 28nm DDR DLL - 200MHz-1000MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2067

1.0

TSMC CLN28HPM 28nm DDR DLL - 316MHz-1580MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2068

1.0

TSMC CLN28HPM 28nm Deskew PLL - 175MHz-875MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2069

1.0

TSMC CLN28HPM 28nm Deskew PLL - 350MHz-1750MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2070

1.0

TSMC CLN28HPM 28nm Deskew PLL - 700MHz-3500MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2071

1.0

TSMC CLN28HPM 28nm General Purpose PLL - 350MHz-1750MHz

The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...

2072

1.0

TSMC CLN28HPM 28nm Multi Phase DLL - 175MHz-875MHz

The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

2073

1.0

TSMC CLN28HPM 28nm Multi Phase DLL - 350MHz-1750MHz

The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

2074

1.0

TSMC CLN28HPM 28nm Multi Phase DLL - 700MHz-3500MHz

The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

2075

1.0

TSMC CLN28HPM 28nm Spread Spectrum PLL - 150MHz-750MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2076

1.0

TSMC CLN28HPM 28nm Spread Spectrum PLL - 300MHz-1500MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2077

1.0

TSMC CLN28HPM 28nm Spread Spectrum PLL - 600MHz-3000MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2078

1.0

TSMC CLN28LP 28nm Clock Generator PLL - 160MHz-800MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2079

1.0

TSMC CLN28LP 28nm Clock Generator PLL - 320MHz-1600MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2080

1.0

TSMC CLN28LP 28nm Clock Generator PLL - 80MHz-400MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2081

1.0

TSMC CLN28LP 28nm DDR DLL - 120MHz-600MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2082

1.0

TSMC CLN28LP 28nm DDR DLL - 189MHz-945MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2083

1.0

TSMC CLN28LP 28nm DDR DLL - 90MHz-450MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2084

1.0

TSMC CLN28LP 28nm Deskew PLL - 160MHz-800MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2085

1.0

TSMC CLN28LP 28nm Deskew PLL - 320MHz-1600MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2086

1.0

TSMC CLN28LP 28nm Deskew PLL - 80MHz-400MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2087

1.0

TSMC CLN28LP 28nm General Purpose PLL - 160MHz-800MHz

The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...

2088

1.0

TSMC CLN28LP 28nm Multi Phase DLL - 160MHz-800MHz

The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

2089

1.0

TSMC CLN28LP 28nm Multi Phase DLL - 320MHz-1600MHz

The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

2090

1.0

TSMC CLN28LP 28nm Multi Phase DLL - 80MHz-400MHz

The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

2091

1.0

TSMC CLN28LP 28nm Spread Spectrum PLL - 140MHz-700MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2092

1.0

TSMC CLN28LP 28nm Spread Spectrum PLL - 280MHz-1400MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2093

1.0

TSMC CLN28LP 28nm Spread Spectrum PLL - 70MHz-350MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2094

1.0

TSMC CLN40G 40nm Clock Generator PLL - 170MHz-850MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2095

1.0

TSMC CLN40G 40nm Clock Generator PLL - 340MHz-1700MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2096

1.0

TSMC CLN40G 40nm Clock Generator PLL - 680MHz-3400MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2097

1.0

TSMC CLN40G 40nm DDR DLL - 150MHz-750MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2098

1.0

TSMC CLN40G 40nm DDR DLL - 200MHz-1000MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2099

1.0

TSMC CLN40G 40nm DDR DLL - 316MHz-1580MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2100

1.0

TSMC CLN40G 40nm Deskew PLL - 170MHz-850MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

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