Design & Reuse
4619 IP
351
1.0
GLOBALFOUNDRIES 28nm SLP 1.8v/1.0v PLL
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352
1.0
GLOBALFOUNDRIES 28nm SLP 1.8v/1.0v PLL
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353
1.0
GLOBALFOUNDRIES 28nm SLP 1.8v/1.0v SUBLVDSTX
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354
1.0
GLOBALFOUNDRIES 28nm SLP 2.5v/1.0v PLL
This IP is a programmable Analog PLL suitable for high speed clock generation. The high speed VCO can run from 800MHz to 3200MHz.By setting DM [5:0] a...
355
1.0
GLOBALFOUNDRIES 28nm SLP Multiple Power Supply IO library
Multiple power supply IO library for GF28nm low power 1.0v/2.5v process...
356
1.0
GLOBALFOUNDRIES 28nm SLP sub-LVDS Receiver
The sub-LVDS Receiver IP is designed as an interface to bridge Video Image Sensors and processors. The receiver consists of PHY only....
357
1.0
GLOBALFOUNDRIES 28nm USB2.0 Dual Role PHY/OTG PHY
The USB 2.0 OTG PHY is a Hi-Speed USB peripheral transceiver IP that implements the Intel® UTMI standard. It provides a High/Full-Speed USB analog fro...
358
1.0
GLOBALFOUNDRIES 40nm Low Power 1.1v/2.5v APLL
This IP is a programmable Analog PLL suitable for high speed clock generation. The high speed VCO can run from 300MHz to 900MHz. By setting DM[3:0], D...
359
1.0
GLOBALFOUNDRIES 40nm LP 2.5V/1.1V Power on Reset
The present Power-On-Reset circuit generates system reset pulses (RST) when both the 2.5V and 1.1V power suppliers are turned on. Output signal RST11 ...
360
1.0
GLOBALFOUNDRIES 40nm LP 3.3V-2.5/1.1V Power Regulator
This IP is a Low-Dropout (LDO) 3.3V to 2.5V and/or 1.1V power regulator in GLOBALFOUNDRIES 40nm LP 1.1V/2.5V process. When it works in regulation regi...
361
1.0
GLOBALFOUNDRIES 40nm LP 3.3V-2.5/1.1V Power Regulator
This IP is a Low-Dropout (LDO) 3.3V to 2.5V and/or 1.1V power regulator in GLOBALFOUNDRIES 40nm LP 1.1V/2.5V process. When it works in regulation regi...
362
1.0
GLOBALFOUNDRIES 55nm 1.2V 10Bit IQ 20/40/80MHz ADC
The VeriSilicon GF55LPEV25_ADC_10 IP is a 1.2V 10Bit pipeline analog to digital converter capable of running at up to 80MHz conversion rate with I and...
363
1.0
GLOBALFOUNDRIES 55nm USB2.0 Dual Role PHY
The USB 2.0 dual role PHY is a Hi-Speed USB peripheral transceiver IP that implements the Intel® UTMI standard. It provides a High/Full-Speed USB anal...
364
1.0
GLOBALFOUNDRIES 65nm 2.5/1.0V 32768Hz Crystal Oscillator
This is a 32768Hz crystal oscillator specifically designed for ultra-low power application. The sole power supply is 3.3V, but it can be as low as 1.6...
365
1.0
GLOBALFOUNDRIES 65nm LVDS Transmitter
The LVDS transmitter is designed to support Single Link transmission between Host and Flat Panel Display with up to SXGA+ resolution and Dual Link tra...
366
1.0
Bluetooth Low Energy (BLE) RF IP
The VeriSilicon Bluetooth Low Energy (BLE) RF IP is a 2.4GHz ISM band transceiver which is designed for Bluetooth Smart or IEEE 802.15.4 based applica...
367
1.0
Bluetooth Low Energy (BLE) RF IP
Bluetooth Low Energy (BLE) RF IP provides a transceiver designed for Bluetooth Smart applications. It is compliant with the BLE specification (part of...
368
1.0
Image Signal Processing IP
The ISP8200 Series ISP is high performance ISP designed for products requiring the processing of multiple camera streams, particularly in automotive, ...
369
1.0
Small Footprint 3D Graphics IP-GC8000Nano
GC8000Nano Series cores address the need for area efficient 3D graphics IP....
370
1.0
Small Footprint 3D Graphics IP-GC8000NanoUltra
GC8000Nano Series cores address the need for area efficient 3D graphics IP....
371
1.0
Small Footprint 3D Graphics IP-GC8000NanoUltra31
GC8000Nano Series cores address the need for area efficient 3D graphics IP....
372
1.0
UMC 0.18um IO Library
UMC 0.18um process 1.8v/3.3v Generic IO library...
373
1.0
UMC 0.18um 1.8v 60MHz Ring Oscillator
The present IP is a Ring Oscillator which is controlled by the external 1.2v bandgap reference. Its output frequency is about 60MHz and it can be fair...
374
1.0
UMC 0.18um 1.8v 80MHz Ring Oscillator
The present IP is a Ring Oscillator which is controlled by the external 1.2v bandgap reference. Its output clocks can be about 80MHz, 60Mhz, 40MHz or ...
375
1.0
UMC 0.18um 3.3v APLL
This IP is a programmable Analog PLL suitable for high speed clock generation. The high speed VCO can run at about 100MHz. By setting different values...
376
1.0
UMC 0.18um 3.3v-1.8v 150mA Power Regulator
Power Regulator, also called Voltage Regulator, is an on-chip device which provides suitable power supply for the core by regulating the external high...
377
1.0
UMC 0.18um 5v-3.3v Power Regulator
Based on UMC 0.18um 3.3v/1.8v Logic Process, current design of a Power Regulator is to provide a 3.3v voltage output regulated from a 5v input supply ...
378
1.0
UMC 0.18um 5v-3.3v Power Regulator
Based on UMC 0.18um 3.3v/1.8v Logic Process, current design of Power Regulator is to provide the 3.3v voltage output regulated from a 5v input supply....
379
1.0
UMC 0.18um 9track Standard Cell Library, 1.8v operating voltage
UMC 0.18um Standard Cell Library...
380
1.0
UMC 0.18um Single-Port/Dual-Port SRAM, Single-Port/Two-Port Register File and Diffusion ROM Compiler
VeriSilicon UMC 0.18um High-Speed Synchronous Memory Compiler optimized for United Microelectronics Corporation (UMC) 0.18um Logic 1P6M Generic II Sal...
381
1.0
UMC 0.18um VCC Detector
The present IP is a VCC Detector (VDT) circuit. It detects the voltage level of its power supply, AV28. The normal operating voltage range of AV28 is ...
382
1.0
UMC 0.18um VCC Detector
The present IP is a VCC Detector (VDT) circuit. It detects the voltage level of input voltage AV33. The normal operation voltage range of AV33 is 3.0v...
383
1.0
SMIC 0.11um 1.2v APLL
This IP is a programmable Analog PLL suitable for high speed clock generation. High speed VCO can run from 50MHz to 500MHz. By setting DM(5:0) and DN(...
384
1.0
SMIC 0.11um 32KHz Crystal Oscillator
Process: SMIC 0.11um Logic 1P8M 1.2V/3.3V CMOS process Operating voltage range: VCC_XO: 1.62~3.6V Operating temperature range: -40~125°C Operati...
385
1.0
SMIC 0.11um 6 track High Density Standard Cell Library - HVT,1.2v operating voltage
SMIC 0.11um 6T HVT High-Density Standard Cell Library...
386
1.0
SMIC 0.11um 6 track High Density Standard Cell Library - LVT,1.2v operating voltage
SMIC 0.11um 6T LVT High-Density Standard Cell Library...
387
1.0
SMIC 0.11um 6 track High Density Standard Cell Library - RVT,1.2v operating voltage
SMIC 0.11um 6T RVT High-Density Standard Cell Library...
388
1.0
SMIC 0.11um 7 track High Density Standard Cell Library - HVT,1.2v operating voltage
SMIC 0.11um 7T HVT High-Density Standard Cell Library...
389
1.0
SMIC 0.11um 7 track High Density Standard Cell Library - LVT,1.2v operating voltage
SMIC 0.11um 7T LVT High-Density Standard Cell Library...
390
1.0
SMIC 0.11um 7 track High Density Standard Cell Library - RVT,1.2v operating voltage
SMIC 0.11um 7T RVT High-Density Standard Cell Library...
391
1.0
SMIC 0.11um 9 track High Density Standard Cell Library - HVT,1.2v operating voltage
SMIC 0.11um 9 track Standard Cell Library - HVT,1.2v operating voltage...
392
1.0
SMIC 0.11um 9 track High Density Standard Cell Library - LVT,1.2v operating voltageSMIC 0.11um 9 track High Density Standard Cell Library - LVT,1.2v operating voltage
SMIC 0.11um 9 track Standard Cell Library - LVT,1.2v operating voltage...
393
1.0
SMIC 0.11um 9 track High Density Standard Cell Library - RVT, 1.2v operating voltage
SMIC 0.11um 9T RVT High-Density Standard Cell Library...
394
1.0
SMIC 0.11um Power Management Kit,1.2v operating voltage
SMIC 0.11um Power Management Kit Library...
395
1.0
SMIC 0.11um USB2.0 Dual Role PHY
The USB 2.0 dual role PHY is a Hi-Speed USB peripheral transceiver IP that implements the Intel® UTMI standard. It provides a High/Full-Speed USB anal...
396
1.0
SMIC 0.13um 1.2v / 3.3v Audio PLL
This PLL is designed for audio clock generation. The reference clock is 13.5MHz crystal or the input clock. It supports both 256X and 384X oversamplin...
397
1.0
SMIC 0.13um 1.2v 200MHz Ring Oscillator
The SMIC18_CODEC_01 specifies the design of a high-performance 16-bit stereo Audio CODEC for portable digital audio systems. The ADCs and DACs within ...
398
1.0
SMIC 0.13um 1.2v APLL
This IP is a programmable Analog PLL suitable for generating system clock. High speed VCO can run from 250MHz to 500MHz. By setting DM [5:0] and DN [7...
399
1.0
SMIC 0.13um 1.2v APLL
This IP is a programmable Analog PLL suitable for high speed clock generation. High speed VCO can run from 50MHz to 500MHz. By setting DM(5:0) and DN(...
400
1.0
SMIC 0.13um 1.2v APLL
This IP is a programmable Analog PLL suitable for high speed clock generation. High speed VCO can run from 50MHz to 500MHz. By setting DM(5:0) and DN(...