351 20.0

PCIe 4.0 PHY in Samsung (14nm, 11nm, SF5A, SF2, SF2P) The multi-channel Synopsys PHY IP for PCI Express® 4.0 includes Synopsys’ high-speed, high-performance transceiver to meet today’s applications’ deman...

352 20.0

SD 4.0 UHS-II PHY TSMC 28nm HPM North-South SD 4.0 (UHS-II) achieves a peak interface speed of 3.12 Gbps. Arasan’s UHS-II PHY is compliant with the specification of UHS-II and is an extremely ar...

353 20.0

SD 4.0 UHS-II PHY , UHS-I / UHS-II Controller Silicon Library's world-first silicon proven UHS-II PHY supporting 1.56Gbps speed is available in various fabs/nodes, including TSMC6/12/40/85, GF28, ...

354 20.0

SD 4.1 UHS-II PHY for TSMC 12nm FF The rapid proliferation of high-performance mobile and handheld devices has resulted in increasing requirements for non-volatile memory. Memory interf...

355 20.0

GDDR6 Memory Controller IP OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...

356 20.0

HDMI 1.4b RX PHY Silicon Library's HDMI 1.4b RX IP supports up to 3Gbps. This silicon proven IP is available in various fabs/nodes including TSMC55/65, GF55/65 and UM...

357 20.0

HDMI 1.4b TX PHY Silicon Library's HDMI 1.4b TX PHY IP supports up to 3Gbps. This silicon proven IP is available in various fabs/nodes including TSMC 40 / 55 / 65 / 8...

358 20.0

HDMI 2.0 RX 1P PHY 6Gbps in TSMC (28nm) The Synopsys HDMI Receiver (RX) IP solutions are compliant with the High- Definition Multimedia Interface (HDMI) 2.0 and 1.4 specifications and provid...

359 20.0

HDMI 2.0 RX 4P PHY 6Gbps in TSMC (28nm) The Synopsys HDMI Receiver (RX) IP solutions are compliant with the High- Definition Multimedia Interface (HDMI) 2.0 and 1.4 specifications and provid...

360 20.0

HDMI 2.0 RX PHY Silicon Library's HDMI 2.0 RX IP supports up to 6Gbps. This silicon proven IP is available in TSMC 12 / 40. Please also refer to our LINK IP....

361 20.0

HDMI 2.0 RX PHY in Samsung (8nm) The Synopsys HDMI Receiver (RX) IP solutions are compliant with the High- Definition Multimedia Interface (HDMI) 2.0 and 1.4 specifications and provid...

362 20.0

HDMI 2.0 TX PHY Silicon Library's HDMI 2.0 TX PHY IP supports up to 6Gbps. This silicon proven IP is available in TSMC 12. Please also refer to our LINK IP....

363 20.0

HDMI 2.0 TX PHY 6Gbps in SMIC (28nm) The Synopsys HDMI Transmitter (TX) IP solutions are compliant with the HDMI 2.0 and 1.4 specifications, and provide the necessary logic to implement ...

364 20.0

HDMI 2.0 TX PHY 6Gbps in TSMC (28nm, 16nm, 12nm) The Synopsys HDMI Transmitter (TX) IP solutions are compliant with the HDMI 2.0 and 1.4 specifications, and provide the necessary logic to implement ...

365 20.0

HDMI 2.0/MHL RX Combo 1P PHY 6Gbps in TSMC (28nm) The Synopsys HDMI Receiver (RX) IP solutions are compliant with the High- Definition Multimedia Interface (HDMI) 2.0 and 1.4 specifications and provid...

366 20.0

HDMI 2.0/MHL TX Combo 6Gbps in TSMC (28nm) The Synopsys HDMI Transmitter (TX) IP solutions are compliant with the HDMI 2.0 and 1.4 specifications, and provide the necessary logic to implement ...

367 20.0

HDMI 2.1 Audio PLL in Samsung (14nm) The Synopsys HDMI 2.1 RX Controller and PHY IP solutions, compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide th...

368 20.0

HDMI 2.1 Audio PLL in TSMC (16nm, 12nm) The Synopsys HDMI 2.1 RX Controller and PHY IP solutions, compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide th...

369 20.0

HDMI 2.1 eARC Rx PHY in GF (12nm) The Synopsys HDMI 2.1 RX Controller and PHY IP solutions, compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide th...

370 20.0

HDMI 2.1 eARC RX PHY in TSMC (16nm, 12nm, N6) The Synopsys HDMI 2.1 RX Controller and PHY IP solutions, compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide th...

371 20.0

HDMI 2.1 eARC Tx PHY in Samsung (14nm) The Synopsys HDMI 2.1 RX Controller and PHY IP solutions, compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide th...

372 20.0

HDMI 2.1 eARC TX PHY in TSMC (16nm, 12nm) The Synopsys HDMI 2.1 RX Controller and PHY IP solutions, compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide th...

373 20.0

HDMI 2.1 Rx PHY 12Gbps in Samsung (14nm) The Synopsys HDMI 2.1 RX Controller and PHY IP solutions, compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide th...

374 20.0

HDMI 2.1 RX PHY 12Gbps in TSMC (16nm, 12nm) The Synopsys HDMI 2.1 RX Controller and PHY IP solutions, compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide th...

375 20.0

HDMI 2.1 Tx PHY in GF (12nm) The Synopsys HDMI 2.1 TX Controller and PHY IP solutions,compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide the...

376 20.0

HDMI 2.1 Tx PHY in Samsung (14nm) The Synopsys HDMI 2.1 TX Controller and PHY IP solutions,compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide the...

377 20.0

FEC As serial link speeds have increased, the reach achievable has become more and more limited by the lossy nature of the physical media which introduces...

378 20.0

Temperature Sensor Deep NWELL, TSMC N3EP A high precision low power junction temperature sensor that has been developed to be easily embedded into digital ASIC designs. The block features an ...

379 20.0

VESA VDC-M V1.2 Decoder Embrace the future of digital media with Arasan's VESA VDC-M v1.2 Decoder. Our groundbreaking product revolutionizes video compression technology, off...

380 20.0

VESA VDC-M Decoder The Video Electronics Standards Association (VESA®) introduced the VESA Display Compression-M (VDC-M) standard, a new display interface compression st...

381 20.0

GF 6-bit, 10 GSPS Analog to Digital Converter (ADC) IP block GlobalFoundries 22nm The A6B10G is a low-power, high-speed analog to digital converter (ADC) intellectual property (IP) design block. It is a flash-type ADC, with 6-bit re...

382 20.0

High Performance HBM, HBM3 Memory Controller OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...

383 20.0

High-Performance AES-GCM/CTR IP The compact, high-performance Synopsys Pipelined AES-GCM/CTR Core implements the AES-GCM/CTR algorithm as specified in the National Institute of Stand...

384 20.0

High-Performance AES-XTS/ECB IP Memory and storage security involves protecting storage resources and the data stored on them, both on-premises and in external data centers and the c...

385 20.0

MIPI C-PHY v1.0 D-PHY v1.2 RX 2 trios/2 Lanes in TSMC (12nm, N5) Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

386 20.0

MIPI C-PHY v1.0 D-PHY v1.2 RX 3 trios/4 Lanes in TSMC (16nm, 12nm, N7, N6, N5) Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

387 20.0

MIPI C-PHY v1.2 D-PHY v2.1 RX 2 trios/2 Lanes in TSMC (16nm, N6, N6C, N5) Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

388 20.0

MIPI C-PHY v1.2 D-PHY v2.1 RX 3 trios/4 Lanes in TSMC (16nm, 12nm, N7, N6, N5, N3P) Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

389 20.0

MIPI C-PHY v1.2 D-PHY v2.1 TX 2 trios/2 Lanes in TSMC (16nm, 12nm, N5) Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

390 20.0

MIPI CSI-2 host/device controllers for high-speed serial interface between image processor and camera sensors Synopsys MIPI® IP solution enables low-power and high-performance interface between system-on-chips (SoCs), application processors, baseband processor...

391 20.0

MIPI CSI-2 Tansmitter v 1.3, C-PHY compatible The MIPI Camera Serial Interface (CSI-2) Transmitter, typically resides in a mobile platform’s camera module, and communicates over a D-PHY/C-PHY link...

392 20.0

MIPI D-PHY ( DPHY ) 1.2 RX Silicon Library's MIPI D-PHY ( DPHY ) 1.2 RX PHY IP supports data rates up to 1.5Gbps. This IP includes two PLLs. This silicon proven IP is available...

393 20.0

MIPI D-PHY ( DPHY ) 1.2 TX Silicon Library's MIPI D-PHY ( DPHY ) 1.2 TX PHY IP supports data rates up to 1.5Gbps and 2.5Gbps per lane (in HS), depending on the technology node. ...

394 20.0

MIPI D-PHY Bidirectional 2 Lanes in GF (40nm, 28nm, 22nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

395 20.0

MIPI D-PHY Bidirectional 2 Lanes in SMIC (40nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

396 20.0

MIPI D-PHY Bidirectional 2 Lanes in TSMC (40nm, 28nm, 16nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

397 20.0

MIPI D-PHY Bidirectional 4 Lanes in Fujitsu (40nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

398 20.0

MIPI D-PHY Bidirectional 4 Lanes in GF (40nm, 28nm, 22nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

399 20.0

MIPI D-PHY Bidirectional 4 Lanes in SMIC (40nm, 28nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

400 20.0

MIPI D-PHY Bidirectional 4 Lanes in TSMC (40nm, 28nm, 16nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...