Silicon Library Inc. IP Cores

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601

1.0

CSMC13V33 process DUPIO, This library includes analog I/O cells and digital I/O cells and supports Inline DUP I/O pad.

VeriSilicon CSMC 0.13μm 1.2V/3.3V DUP I/O Cell Library developed by VeriSilicon is optimized for Central Semiconductor Manufacturing Corporation (CSMC...

602

1.0

Huali 28nm HKCP process Multiple Power Supply IO library

The Multiple I/O Library supports both 2.5V analog IO cells & 3.3V digital IO cells. Digital IO contains 5V tolerance, open-drain & OSC cells. This li...

603

0.118

1.4V~3.6V to 1.2V with 100mA driving capability; Linear Regulator; UMC 90nm LL/RVT LowK LOGIC PROCESS minLib Cell Library

1.4V~3.6V to 1.2V with 100mA driving capability; Linear Regulator; UMC 90nm LL/RVT LowK LOGIC PROCESS minLib Cell Library...

604

0.118

28nm Logic and Mixed-Mode HLP/RVT Process Multi-Voltage BOAC I/O Cell library

28nm Logic and Mixed-Mode HLP/RVT Process Multi-Voltage BOAC I/O Cell library...

605

0.118

28nm Logic and Mixed-Mode HPC/RVT Process Multi-Voltage BOAC I/O Cell library

28nm Logic and Mixed-Mode HPC/RVT Process Multi-Voltage BOAC I/O Cell library...

606

0.118

Faraday 1.8V crystal oscillator I/O Cell Library ; UMC 14nm LOGIC_MIXED-FF+ Process

Faraday 1.8V crystal oscillator I/O Cell Library ; UMC 14nm LOGIC_MIXED-FF+ Process...

607

0.118

HJTC 0.11um eFlash Process Generic Core Cell Library (porting from FSR0K_D)

HJTC 0.11um eFlash Process Generic Core Cell Library (porting from FSR0K_D)...

608

0.118

UMC 0.11um AE/HS logic process Multi-Voltage BOAC SD3.0 I/O Cell library

UMC 0.11um AE/HS logic process Multi-Voltage BOAC SD3.0 I/O Cell library...

609

0.118

UMC 0.11um AL/LL Logic Process miniLib standard cell library

UMC 0.11um AL/LL Logic Process miniLib standard cell library...

610

0.118

UMC 0.11um CIS Process cell library

UMC 0.11um CIS Process cell library...

611

0.118

UMC 0.11um HS/AL Logic Process High Density Version MPCA core cell library with mini programming layer from V1 to M4

UMC 0.11um HS/AL Logic Process High Density Version MPCA core cell library with mini programming layer from V1 to M4...

612

0.118

UMC 0.11um HS/AL Logic Process True 3.3V Standard IO Cell Library

UMC 0.11um HS/AL Logic Process True 3.3V Standard IO Cell Library...

613

0.118

UMC 0.11um HS/ALE Logic Process MPCA Cell Library With minimum Via1/M2/Via2/M3/Via3/M4 programming

UMC 0.11um HS/ALE Logic Process MPCA Cell Library With minimum Via1/M2/Via2/M3/Via3/M4 programming...

614

0.118

UMC 0.11um HS/FSG Logic Process high density MPCA core cell library with minimum Via1 to M4 programming

UMC 0.11um HS/FSG Logic Process high density MPCA core cell library with minimum Via1 to M4 programming...

615

0.118

UMC 0.13um HS/FSG Logic Process metal2-start programming gate array cell library for FSC0H_J (ECO_M2)

UMC 0.13um HS/FSG Logic Process metal2-start programming gate array cell library for FSC0H_J (ECO_M2)...

616

0.118

UMC 0.13um LL/FSG Logic Process Metal1 Start ECO core cell library

UMC 0.13um LL/FSG Logic Process Metal1 Start ECO core cell library...

617

0.118

UMC 0.13um SP/FSG Logic Process Metal1 Start ECO core cell library

UMC 0.13um SP/FSG Logic Process Metal1 Start ECO core cell library...

618

0.118

UMC 0.162um eHV 3.3V/8.25V/16.5V Process Standard IO Library

UMC 0.162um eHV 3.3V/8.25V/16.5V Process Standard IO Library...

619

0.118

UMC 0.18um Generic process MPCA core cell library

UMC 0.18um Generic process MPCA core cell library...

620

0.118

UMC 0.18um GII Logic Process 3.3V core cell library

UMC 0.18um GII Logic Process 3.3V core cell library...

621

0.118

UMC 0.18um Logic GII Process true 3.3V RTC IO cell Library

UMC 0.18um Logic GII Process true 3.3V RTC IO cell Library...

622

0.118

UMC 0.35um embedded HV Process 3.3V Crystal IO library

UMC 0.35um embedded HV Process 3.3V Crystal IO library...

623

0.118

UMC 0.35um embedded HV Process 3.3V Crystal Low Frequency IO library

UMC 0.35um embedded HV Process 3.3V Crystal Low Frequency IO library...

624

0.118

UMC 0.3um HV process, M1-start ECO (engineering change order) core cell library

UMC 0.3um HV process, M1-start ECO (engineering change order) core cell library...

625

0.118

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track eco_m1 cell library (C35)

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track eco_m1 cell library (C35)...

626

0.118

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track generic_core cell library (C35)

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track generic_core cell library (C35)...

627

0.118

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track generic_core cell library (C40)

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track generic_core cell library (C40)...

628

0.118

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track PowerSlash cell library (C35)

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track PowerSlash cell library (C35)...

629

0.118

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track Standard Generic core cell library (C30)

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track Standard Generic core cell library (C30)...

630

0.118

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track ECO_M1 cell library enhanced for routing (C35)

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track ECO_M1 cell library enhanced for routing (C35)...

631

0.118

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C30)

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C30)...

632

0.118

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C35)

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C35)...

633

0.118

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C40)

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C40)...

634

0.118

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track POWERSLASH cell library enhanced for routing (C35)

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track POWERSLASH cell library enhanced for routing (C35)...

635

0.118

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track ECO_M1 cell library enhanced for routing (C35)

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track ECO_M1 cell library enhanced for routing (C35)...

636

0.118

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C30)

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C30)...

637

0.118

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C35)

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C35)...

638

0.118

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C40)

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C40)...

639

0.118

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track POWERSLASH cell library enhanced for routing (C35)

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track POWERSLASH cell library enhanced for routing (C35)...

640

0.118

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track eco_m1 cell library (C35)

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track eco_m1 cell library (C35)...

641

0.118

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track PowerSlash cell library (C35)

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track PowerSlash cell library (C35)...

642

0.118

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track Standard Cell library (C35)

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track Standard Cell library (C35)...

643

0.118

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track Standard Generic core cell library (C30)

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track Standard Generic core cell library (C30)...

644

0.118

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track Standard Generic core cell library (C40)

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track Standard Generic core cell library (C40)...

645

0.118

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track ECO_M1 cell library enhanced for routing (C35)

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track ECO_M1 cell library enhanced for routing (C35)...

646

0.118

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C30)

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C30)...

647

0.118

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C35)

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C35)...

648

0.118

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C40)

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C40)...

649

0.118

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track POWERSLASH cell library enhanced for routing (C35)

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track POWERSLASH cell library enhanced for routing (C35)...

650

0.118

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track ECO_M1 cell library enhanced for routing (C35)

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track ECO_M1 cell library enhanced for routing (C35)...

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