Design & Reuse
Catalog of SIP Cores
System on Chip design resources
6557 IP
6301
0.0
TSMC CLN6FFLVT 6nm Spread Spectrum PLL - 1050MHz-5250MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
6302
0.0
TSMC CLN6FFLVT 6nm Spread Spectrum PLL - 262MHz-1310MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
6303
0.0
TSMC CLN6FFLVT 6nm Spread Spectrum PLL - 524MHz-2620MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
6304
0.0
TSMC CLN6FFLVT 6nm Ultra PLL - 15MHz-3000MHz
The Ultra PLL is designed with a state-of-the-art architecture using high-speed digital and analog circuits that offers exceptional performance, featu...
6305
0.0
TSMC CLN7FF 7nm Clock Generator PLL - 200MHz-1000MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
6306
0.0
TSMC CLN7FF 7nm Clock Generator PLL - 400MHz-2000MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
6307
0.0
TSMC CLN7FF 7nm DDR DLL - 188MHz-940MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
6308
0.0
TSMC CLN7FF 7nm DDR DLL - 395MHz-1975MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
6309
0.0
TSMC CLN7FF 7nm DDR3 PHY - 2133Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
6310
0.0
TSMC CLN7FF 7nm DDR4 PHY - 4266Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
6311
0.0
TSMC CLN7FF 7nm DDR5 PHY - 6400Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
6312
0.0
TSMC CLN7FF 7nm Deskew PLL - 200MHz-1000MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
6313
0.0
TSMC CLN7FF 7nm Deskew PLL - 800MHz-4000MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
6314
0.0
TSMC CLN7FF 7nm LPDDR3 PHY - 2133Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
6315
0.0
TSMC CLN7FF 7nm LPDDR4 PHY - 4266Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
6316
0.0
TSMC CLN7FF 7nm LPDDR5 PHY - 6400Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
6317
0.0
TSMC CLN7FF 7nm Multi Phase DLL - 200MHz-1000MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
6318
0.0
TSMC CLN7FF 7nm Multi Phase DLL - 400MHz-2000MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
6319
0.0
TSMC CLN7FF 7nm Spread Spectrum PLL - 175MHz-875MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
6320
0.0
TSMC CLN7FF 7nm Spread Spectrum PLL - 350MHz-1750MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
6321
0.0
TSMC CLN7FFLVT 7nm Clock Generator PLL - 1200MHz-6000MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
6322
0.0
TSMC CLN7FFLVT 7nm Clock Generator PLL - 300MHz-1500MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
6323
0.0
TSMC CLN7FFLVT 7nm Clock Generator PLL - 600MHz-3000MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
6324
0.0
TSMC CLN7FFLVT 7nm DDR DLL - 270MHz-1350MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
6325
0.0
TSMC CLN7FFLVT 7nm DDR DLL - 568MHz-2840MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
6326
0.0
TSMC CLN7FFLVT 7nm DDR3 PHY - 2133Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
6327
0.0
TSMC CLN7FFLVT 7nm DDR4 PHY - 4266Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
6328
0.0
TSMC CLN7FFLVT 7nm DDR5 PHY - 6400Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
6329
0.0
TSMC CLN7FFLVT 7nm Deskew PLL - 1200MHz-6000MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
6330
0.0
TSMC CLN7FFLVT 7nm Deskew PLL - 600MHz-3000MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
6331
0.0
TSMC CLN7FFLVT 7nm General Purpose PLL - 600MHz-3000MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...
6332
0.0
TSMC CLN7FFLVT 7nm LPDDR3 PHY - 2133Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
6333
0.0
TSMC CLN7FFLVT 7nm LPDDR4 PHY - 4266Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
6334
0.0
TSMC CLN7FFLVT 7nm LPDDR5 PHY - 6400Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
6335
0.0
TSMC CLN7FFLVT 7nm Multi Phase DLL - 300MHz-1500MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
6336
0.0
TSMC CLN7FFLVT 7nm Multi Phase DLL - 600MHz-3000MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
6337
0.0
TSMC CLN7FFLVT 7nm Spread Spectrum PLL - 1050MHz-5250MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
6338
0.0
TSMC CLN7FFLVT 7nm Spread Spectrum PLL - 262MHz-1310MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
6339
0.0
TSMC CLN7FFLVT 7nm Spread Spectrum PLL - 524MHz-2620MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
6340
0.0
TSMC CLN7FFLVT 7nm Ultra PLL - 15MHz-3000MHz
The Ultra PLL is designed with a state-of-the-art architecture using high-speed digital and analog circuits that offers exceptional performance, featu...
6341
0.0
TSMC CLN80GC 80nm General Purpose PLL - 160MHz-800MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...
6342
0.0
TSMC CLN80GT 80nm General Purpose PLL - 250MHz-1250MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...
6343
0.0
TSMC CLN80HS 80nm General Purpose PLL - 250MHz-1250MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...
6344
0.0
TSMC CLN85LP 90nm Clock Generator PLL - 120MHz-600MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
6345
0.0
TSMC CLN85LP 90nm Clock Generator PLL - 240MHz-1200MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
6346
0.0
TSMC CLN85LP 90nm Clock Generator PLL - 60MHz-300MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
6347
0.0
TSMC CLN85LP 90nm DDR DLL - 104MHz-520MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
6348
0.0
TSMC CLN85LP 90nm DDR DLL - 164MHz-820MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
6349
0.0
TSMC CLN85LP 90nm DDR DLL - 78MHz-390MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
6350
0.0
TSMC CLN85LP 90nm Deskew PLL - 120MHz-600MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...