Design & Reuse
Catalog of SIP Cores
System on Chip design resources
6557 IP
2001
10.0
High Speed PLL - TSMC N5
Analog Bits’ High Speed 20GHz PLL creates a high speed clock with good duty cycle and jitter characteristics useful for high speed, source synchronous...
2002
10.0
High Speed PLL - TSMC N5A
Analog Bits’ High Speed 20GHz PLL creates a high speed clock with good duty cycle and jitter characteristics useful for high speed, source synchronous...
2003
10.0
High Speed PLL - TSMC N5A
Analog Bits’ High Speed 20GHz PLL creates a high speed clock with good duty cycle and jitter characteristics useful for high speed, source synchronous...
2004
10.0
High Speed PLL CML to Complementary - TSMC CLN3P
Analog Bits’ High Speed 20GHz PLL creates a high speed clock with good duty cycle and jitter characteristics useful for high speed, source synchronous...
2005
10.0
TileLink Target
TileLink is a chip-scale connection standard that enables many masters to have synchronised memory mapped access to memory and other slave devices. Ti...
2006
10.0
LIN Bus Master/Slave Controller Core
Implements a communication controller that transmits and receives complete Local Interconnect Network (LIN) frames to perform serial communication acc...
2007
10.0
MIPI C-PHY v1.2 D-PHY v2.1 RX 2 trios/2 Lanes in TSMC (16nm) for Automotive
Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...
2008
10.0
MIPI C-PHY v1.2 D-PHY v2.1 RX 3 trios/4 Lanes in TSMC (16nm, N7) for Automotive
Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...
2009
10.0
MIPI C-PHY v1.2 D-PHY v2.1 TX 2 trios/2 Lanes in TSMC (16nm) for Automotive
Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...
2010
10.0
MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (16nm, N7, N5A, N3A)
Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...
2011
10.0
MIPI C-PHY v2.0 D-PHY v2.1 RX 2 trios/2 Lanes in TSMC (N5A, N3A)
Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...
2012
10.0
MIPI D-PHY TSMC 130nm
Arasan delivers you a MIPI D-PHY in the process node and lane configuration you need, conforming to your specific design constraints, with a complete ...
2013
10.0
MIPI D-PHY TSMC 28nm HPC+ @ 2.5Ghz
The Arasan’s MIPI D-PHY Analog Transceiver IP Core is fully compliant to the D-PHY specification version 1.1. It supports the MIPI® Camera Serial Inte...
2014
10.0
MIPI D-PHY Tx-Only 2 Lanes in TSMC (16nm, N7) for Automotive
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
2015
10.0
MIPI D-PHY Tx-Only 4 Lanes in TSMC (16nm, N7) for Automotive
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
2016
10.0
MIPI DSI-2 Transmit Controller v1.0
The Arasan DSI-2 Device Controller IP is designed to provide MIPI DSI-2 1.0 compliant high speed serial connectivity for mobile host processors using ...
2017
10.0
MIPI I3C Basic Secondary Controller
The I3C-SC core implements a versatile MIPI® Improved Inter Integrated Circuit (I3C) Secondary Controller core compliant with the latest MIPI I3C Basi...
2018
10.0
MIPI I3C PHY I/O
Arasan’s MIPI I3CⓇ PHY I/O IP, in compliance with MIPI I3CⓇ specifications v1.1. Arasan’s MIPI I3CⓇ PHY IP is part of Arasan’s Total IP Solution for M...
2019
10.0
MIPI M-PHY Designed For TSMC 28nm
ACS-AIP-MPHY-28HPM MIPI Specification Version 3.0 is a low pin count, power efficient, inter-chip serial interface with high bandwidth capabilities. A...
2020
10.0
MIPI M-PHY G4 Designed For TSMC 28nm HPC+
ACS-AIP-MPHY-28HPC+ MIPI Specification Version 4.1 is a low pin count, power efficient, inter-chip serial interface with high bandwidth capabilities. ...
2021
10.0
MIPI Soundwire PHY
The physical layer block implements all the line-side functions such as NRZI encoding & decoding, bus clash detection, data line buffer enable/disable...
2022
10.0
Wishbone Target
The Wishbone System-on-Chip (SoC) Interconnection Architecture for Portable IP Cores is a versatile design approach for semiconductor IP cores. Its go...
2023
10.0
Distributed Thermal Sensor (DTS) Deep NWELL, TSMC N3
The highly granular DTS offers a significant area reduction in comparison to some standard in-chip thermal sensor solutions and supports high accuracy...
2024
10.0
Distributed Thermal Sensor (DTS) Deep NWELL, TSMC N3EP
The highly granular DTS offers a significant area reduction in comparison to some standard in-chip thermal sensor solutions and supports high accuracy...
2025
10.0
Distributed Thermal Sensor (DTS) Deep NWELL, TSMC N4P
The highly granular DTS offers a significant area reduction in comparison to some standard in-chip thermal sensor solutions and supports high accuracy...
2026
10.0
Distributed Thermal Sensor (DTS) Deep NWELL, TSMC N5
The highly granular DTS offers a significant area reduction in comparison to some standard in-chip thermal sensor solutions and supports high accuracy...
2027
10.0
Distributed Thermal Sensor (DTS) Non Deep NWELL
The highly granular DTS offers a significant area reduction in comparison to some standard in-chip thermal sensor solutions and supports high accuracy...
2028
10.0
Distributed Thermal Sensor (DTS) Non Deep NWELL
The highly granular DTS offers a significant area reduction in comparison to some standard in-chip thermal sensor solutions and supports high accuracy...
2029
10.0
Distributed Thermal Sensor (DTS) Non Deep NWELL TSMC N6
The highly granular DTS offers a significant area reduction in comparison to some standard in-chip thermal sensor solutions and supports high accuracy...
2030
10.0
Distributed Thermal Sensor (DTS) Non-Deep NWELL, TSMC N3
The highly granular DTS offers a significant area reduction in comparison to some standard in-chip thermal sensor solutions and supports high accuracy...
2031
10.0
Distributed Thermal Sensor (DTS) Non-Deep NWELL, TSMC N3EP
The highly granular DTS offers a significant area reduction in comparison to some standard in-chip thermal sensor solutions and supports high accuracy...
2032
10.0
Distributed Thermal Sensor (DTS) Non-Deep NWELL, TSMC N4P
The highly granular DTS offers a significant area reduction in comparison to some standard in-chip thermal sensor solutions and supports high accuracy...
2033
10.0
Distributed Thermal Sensor (DTS) Non-Deep NWELL, TSMC N5
The highly granular DTS offers a significant area reduction in comparison to some standard in-chip thermal sensor solutions and supports high accuracy...
2034
10.0
Glitch Detector - TSMC CLN3A
Analog Bits’ Glitch Detector macro comprehensively addresses typical SOC power supply and other voltage glitch monitoring needs in a fully integrated ...
2035
10.0
Glitch Detector - TSMC CLN3E
Analog Bits’ Glitch Detector macro comprehensively addresses typical SOC power supply and other voltage glitch monitoring needs in a fully integrated ...
2036
10.0
Glitch Detector - TSMC CLN3P
Analog Bits’ Glitch Detector macro comprehensively addresses typical SOC power supply and other voltage glitch monitoring needs in a fully integrated ...
2037
10.0
Glitch Detector - TSMC CLN4P
Analog Bits’ Glitch Detector macro comprehensively addresses typical SOC power supply and other voltage glitch monitoring needs in a fully integrated ...
2038
10.0
Glitch Detector - TSMC CLN5A
Analog Bits’ Glitch Detector macro comprehensively addresses typical SOC power supply and other voltage glitch monitoring needs in a fully integrated ...
2039
10.0
Glitch Detector - TSMC N5
Analog Bits’ Glitch Detector macro comprehensively addresses typical SOC power supply and other voltage glitch monitoring needs in a fully integrated ...
2040
10.0
Ultra High Performance AES-XTS/ECB Core
The proliferation and expansion of connected devices, connectivity infrastructure, cloud computing, and artificial intelligence is driving for increas...
2041
10.0
Ultra High-Performance AES-GCM/CTR IP
The proliferation and expansion of connected devices, connectivity infrastructure, cloud computing, and artificial intelligence is driving for increas...
2042
10.0
AMBA AHB Target
AMBA AHB is a bus interface designed for high-performance synthesizable applications. It specifies the interface between components such as initiator ...
2043
10.0
AMBA APB Target
Advanced Peripheral Bus (APB) is one of the Advanced Microcontroller Bus Architecture (AMBA) family protocols. It is a low-cost interface that is desi...
2044
10.0
AMBA AXI Target
The "advanced extensible interface" (AXI) bus is a high-performance parallel bus that connects on-chip peripheral circuits (or IP blocks) to processor...
2045
10.0
VME System Controller with AXI4 compliant user interface
The VMESCmodule2 is a VME System Controller core designed for FPGA and ASIC integrations. The core contains VME Slave and Master functions as well as ...
2046
10.0
VME System Controller with AXI4 user interface and 2eSST support
The VMESCmodule2e is a VME System Controller core designed for FPGA and ASIC integrations. The core contains VME Slave and Master functions as well as...
2047
10.0
CML Buffer - TSMC CLN3A
Analog Bits’ CML buffer macro is a CML differential buffer for on-chip applications, and addresses a large portfolio of applications requiring CML sig...
2048
10.0
CML Buffer - TSMC CLN3E
Analog Bits’ CML buffer macro is a CML differential buffer for on-chip applications, and addresses a large portfolio of applications requiring CML sig...
2049
10.0
CML Buffer - TSMC CLN3P
Analog Bits’ CML buffer macro is a CML differential buffer for on-chip applications, and addresses a large portfolio of applications requiring CML sig...
2050
10.0
CML Buffer - TSMC CLN4P
Analog Bits’ CML buffer macro is a CML differential buffer for on-chip applications, and addresses a large portfolio of applications requiring CML sig...