Design & Reuse
5928 IP
2901
1.0
UMC L80GOD 80nm Deskew PLL - 300MHz-1500MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2902
1.0
UMC L80GOD 80nm Deskew PLL - 600MHz-3000MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2903
1.0
UMC L80GOD 80nm Spread Spectrum PLL - 150MHz-750MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2904
1.0
UMC L80GOD 80nm Spread Spectrum PLL - 300MHz-1500MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2905
1.0
UMC L80GOD 80nm Spread Spectrum PLL - 600MHz-3000MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2906
1.0
UMC L90G 90nm Clock Generator PLL - 180MHz-900MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2907
1.0
UMC L90G 90nm Clock Generator PLL - 360MHz-1800MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2908
1.0
UMC L90G 90nm Clock Generator PLL - 90MHz-450MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2909
1.0
UMC L90G 90nm DDR DLL - 108MHz-540MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2910
1.0
UMC L90G 90nm DDR DLL - 144MHz-720MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2911
1.0
UMC L90G 90nm Deskew PLL - 180MHz-900MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2912
1.0
UMC L90G 90nm Deskew PLL - 360MHz-1800MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2913
1.0
UMC L90G 90nm Deskew PLL - 90MHz-450MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2914
1.0
UMC L90G 90nm Spread Spectrum PLL - 180MHz-900MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2915
1.0
UMC L90G 90nm Spread Spectrum PLL - 360MHz-1800MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2916
1.0
UMC L90G 90nm Spread Spectrum PLL - 90MHz-450MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2917
1.0
UMC L90GOD 90nm Clock Generator PLL - 125MHz-625MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2918
1.0
UMC L90GOD 90nm Clock Generator PLL - 250MHz-1250MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2919
1.0
UMC L90GOD 90nm Clock Generator PLL - 500MHz-2500MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2920
1.0
UMC L90GOD 90nm DDR DLL - 144MHz-720MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2921
1.0
UMC L90GOD 90nm DDR DLL - 192MHz-960MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2922
1.0
UMC L90GOD 90nm Deskew PLL - 125MHz-625MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2923
1.0
UMC L90GOD 90nm Deskew PLL - 250MHz-1250MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2924
1.0
UMC L90GOD 90nm Deskew PLL - 500MHz-2500MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2925
1.0
UMC L90GOD 90nm Spread Spectrum PLL - 125MHz-625MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2926
1.0
UMC L90GOD 90nm Spread Spectrum PLL - 250MHz-1250MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2927
1.0
UMC L90GOD 90nm Spread Spectrum PLL - 500MHz-2500MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2928
1.0
UMC L90SP 90nm Clock Generator PLL - 120MHz-600MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2929
1.0
UMC L90SP 90nm Clock Generator PLL - 240MHz-1200MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2930
1.0
UMC L90SP 90nm Clock Generator PLL - 60MHz-300MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2931
1.0
UMC L90SP 90nm DDR DLL - 60MHz-300MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2932
1.0
UMC L90SP 90nm DDR DLL - 80MHz-400MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2933
1.0
UMC L90SP 90nm Deskew PLL - 120MHz-600MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2934
1.0
UMC L90SP 90nm Deskew PLL - 240MHz-1200MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2935
1.0
UMC L90SP 90nm Deskew PLL - 60MHz-300MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2936
1.0
UMC L90SP 90nm Spread Spectrum PLL - 120MHz-600MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2937
1.0
UMC L90SP 90nm Spread Spectrum PLL - 240MHz-1200MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2938
1.0
UMC L90SP 90nm Spread Spectrum PLL - 60MHz-300MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2939
1.0
CMOS Low Power Programmable Frequency Divider(50-2400 MHz)
...
2940
1.0
CMOS Low Power Programmable Frequency Divider(50-2400 MHz) IP Fabricated
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2941
1.0
DNC IR SSB Mixer used in transceiver applications
RFDN03C (DNC Mixer) is IR SSB Mixer used in transceiver application. The process used to design DNC Mixer is 0.1um GaAs pHEMT. This Mixer employs two ...
2942
1.0
InGaP HBT low power buffer amplifier
The GEDA02 is 20 GHz to 40 GHz low power buffer amplifier. The amplifier is designed using 2 ìm InGaP HBT process for high frequency applications. ...
2943
1.0
Poly Phase CMOS Programmable Frequency Divider (50-2400 MHz)
...
2944
1.0
Low Dropout Voltage regulator
...
2945
1.0
Low noise amplifier for 28-40 Ghz frequencies for 5G, satcom and other applications
RFLN05C is a four stage low noise amplifier. It provide high gain over wide bandwidth,low Noise Figure, high isolation, stability. The LNA is designed...
2946
1.0
Low noise amplifier with lange couplers for 20-40 GHz frequencies for 5G , satcom and other applications
RFLN03C is a three stage low noise amplifier with Lange Coupler at input & output side for perfect input and output matching to 50 ohms. It provides h...
2947
1.0
Low noise amplifier with lange couplers for 24-42 GHz frequencies for 5G , satcom and other applications
RFLN06C is a four stage low noise amplifier. It provides high gain over wide bandwidth, low noise figure, high isolation, stability. The LNA is design...
2948
1.0
LOW POWER VOLTAGE REF
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2949
1.0
Downconverter IR SSB Mixer used in receives
RFDN02C (DNC Mixer) is IR SSB Mixer used in receive application. The process used to design DNC Mixer is 0.1um GaAs pHEMT. This Mixer employs two resi...
2950
1.0
Up convert LO reject Mixer used in RF transceiver applications
RFUD01C (UPC Mixer) is LO reject Mixer used in RF transceiver applications. The process used to design UPC Mixer is 0.1um GaAs pHEMT. This is singly b...