Silicon Library Inc. IP Cores

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3001

1.0

TSMC CL018G 180nm Spread Spectrum PLL - 220MHz-1100MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

3002

1.0

TSMC CL018G 180nm Spread Spectrum PLL - 55MHz-275MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

3003

1.0

TSMC CL018LP 180nm Clock Generator PLL - 180MHz-900MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

3004

1.0

TSMC CL018LP 180nm Clock Generator PLL - 45MHz-225MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

3005

1.0

TSMC CL018LP 180nm Clock Generator PLL - 90MHz-450MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

3006

1.0

TSMC CL018LP 180nm DDR DLL - 30MHz-150MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

3007

1.0

TSMC CL018LP 180nm DDR DLL - 40MHz-200MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

3008

1.0

TSMC CL018LP 180nm DDR DLL - 63MHz-315MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

3009

1.0

TSMC CL018LP 180nm Deskew PLL - 180MHz-900MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

3010

1.0

TSMC CL018LP 180nm Deskew PLL - 45MHz-225MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

3011

1.0

TSMC CL018LP 180nm Deskew PLL - 90MHz-450MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

3012

1.0

TSMC CL018LP 180nm Spread Spectrum PLL - 180MHz-900MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

3013

1.0

TSMC CL018LP 180nm Spread Spectrum PLL - 45MHz-225MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

3014

1.0

TSMC CL018LP 180nm Spread Spectrum PLL - 90MHz-450MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

3015

1.0

TSMC CL018LV 180nm Clock Generator PLL - 118MHz-590MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

3016

1.0

TSMC CL018LV 180nm Clock Generator PLL - 236MHz-1180MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

3017

1.0

TSMC CL018LV 180nm Clock Generator PLL - 59MHz-295MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

3018

1.0

TSMC CL018LV 180nm DDR DLL - 101MHz-505MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

3019

1.0

TSMC CL018LV 180nm DDR DLL - 48MHz-240MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

3020

1.0

TSMC CL018LV 180nm DDR DLL - 64MHz-320MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

3021

1.0

TSMC CL018LV 180nm Deskew PLL - 118MHz-590MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

3022

1.0

TSMC CL018LV 180nm Deskew PLL - 236MHz-1180MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

3023

1.0

TSMC CL018LV 180nm Deskew PLL - 59MHz-295MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

3024

1.0

TSMC CL018LV 180nm Spread Spectrum PLL - 118MHz-590MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

3025

1.0

TSMC CL018LV 180nm Spread Spectrum PLL - 236MHz-1180MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

3026

1.0

TSMC CL018LV 180nm Spread Spectrum PLL - 59MHz-295MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

3027

1.0

TSMC CLN28HP 28nm Clock Generator PLL - 175MHz-875MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

3028

1.0

TSMC CLN28HP 28nm Clock Generator PLL - 350MHz-1750MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

3029

1.0

TSMC CLN28HP 28nm Clock Generator PLL - 700MHz-3500MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

3030

1.0

TSMC CLN28HP 28nm DDR DLL - 150MHz-750MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

3031

1.0

TSMC CLN28HP 28nm DDR DLL - 200MHz-1000MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

3032

1.0

TSMC CLN28HP 28nm DDR DLL - 316MHz-1580MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

3033

1.0

TSMC CLN28HP 28nm Deskew PLL - 175MHz-875MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

3034

1.0

TSMC CLN28HP 28nm Deskew PLL - 350MHz-1750MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

3035

1.0

TSMC CLN28HP 28nm Deskew PLL - 700MHz-3500MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

3036

1.0

TSMC CLN28HP 28nm General Purpose PLL - 350MHz-1750MHz

The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...

3037

1.0

TSMC CLN28HP 28nm Spread Spectrum PLL - 150MHz-750MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

3038

1.0

TSMC CLN28HP 28nm Spread Spectrum PLL - 300MHz-1500MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

3039

1.0

TSMC CLN28HP 28nm Spread Spectrum PLL - 600MHz-3000MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

3040

1.0

TSMC CLN28HPL 28nm Clock Generator PLL - 110MHz-550MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

3041

1.0

TSMC CLN28HPL 28nm Clock Generator PLL - 220MHz-1100MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

3042

1.0

TSMC CLN28HPL 28nm Clock Generator PLL - 440MHz-2200MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

3043

1.0

TSMC CLN28HPL 28nm DDR DLL - 117MHz-585MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

3044

1.0

TSMC CLN28HPL 28nm DDR DLL - 156MHz-780MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

3045

1.0

TSMC CLN28HPL 28nm DDR DLL - 246MHz-1230MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

3046

1.0

TSMC CLN28HPL 28nm Deskew PLL - 110MHz-550MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

3047

1.0

TSMC CLN28HPL 28nm Deskew PLL - 220MHz-1100MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

3048

1.0

TSMC CLN28HPL 28nm Deskew PLL - 440MHz-2200MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

3049

1.0

TSMC CLN28HPL 28nm General Purpose PLL - 220MHz-1100MHz

The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...

3050

1.0

TSMC CLN28HPL 28nm Multi Phase DLL - 110MHz-550MHz

The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

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