Silicon Library Inc. IP Cores

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3101

1.0

TSMC CLN40G 40nm Spread Spectrum PLL - 150MHz-750MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

3102

1.0

TSMC CLN40G 40nm Spread Spectrum PLL - 300MHz-1500MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

3103

1.0

TSMC CLN40G 40nm Spread Spectrum PLL - 600MHz-3000MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

3104

1.0

TSMC CLN40LP 40nm Clock Generator PLL - 150MHz-750MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

3105

1.0

TSMC CLN40LP 40nm Clock Generator PLL - 300MHz-1500MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

3106

1.0

TSMC CLN40LP 40nm Clock Generator PLL - 75MHz-375MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

3107

1.0

TSMC CLN40LP 40nm DDR DLL - 112MHz-560MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

3108

1.0

TSMC CLN40LP 40nm DDR DLL - 177MHz-885MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

3109

1.0

TSMC CLN40LP 40nm DDR DLL - 84MHz-420MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

3110

1.0

TSMC CLN40LP 40nm Deskew PLL - 150MHz-750MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

3111

1.0

TSMC CLN40LP 40nm Deskew PLL - 300MHz-1500MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

3112

1.0

TSMC CLN40LP 40nm Deskew PLL - 75MHz-375MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

3113

1.0

TSMC CLN40LP 40nm General Purpose PLL - 150MHz-750MHz

The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...

3114

1.0

TSMC CLN40LP 40nm Multi Phase DLL - 150MHz-750MHz

The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

3115

1.0

TSMC CLN40LP 40nm Multi Phase DLL - 300MHz-1500MHz

The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

3116

1.0

TSMC CLN40LP 40nm Multi Phase DLL - 75MHz-375MHz

The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

3117

1.0

TSMC CLN40LP 40nm Spread Spectrum PLL - 150MHz-750MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

3118

1.0

TSMC CLN40LP 40nm Spread Spectrum PLL - 300MHz-1500MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

3119

1.0

TSMC CLN40LP 40nm Spread Spectrum PLL - 75MHz-375MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

3120

1.0

TSMC CLN55GP 55nm Clock Generator PLL - 130MHz-650MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

3121

1.0

TSMC CLN55GP 55nm Clock Generator PLL - 260MHz-1300MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

3122

1.0

TSMC CLN55GP 55nm Clock Generator PLL - 520MHz-2600MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

3123

1.0

TSMC CLN55GP 55nm DDR DLL - 150MHz-750MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

3124

1.0

TSMC CLN55GP 55nm DDR DLL - 200MHz-1000MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

3125

1.0

TSMC CLN55GP 55nm DDR DLL - 316MHz-1580MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

3126

1.0

TSMC CLN55GP 55nm Deskew PLL - 130MHz-650MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

3127

1.0

TSMC CLN55GP 55nm Deskew PLL - 260MHz-1300MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

3128

1.0

TSMC CLN55GP 55nm Deskew PLL - 520MHz-2600MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

3129

1.0

TSMC CLN55GP 55nm General Purpose PLL - 260MHz-1300MHz

The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...

3130

1.0

TSMC CLN55GP 55nm Multi Phase DLL - 130MHz-650MHz

The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

3131

1.0

TSMC CLN55GP 55nm Multi Phase DLL - 260MHz-1300MHz

The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

3132

1.0

TSMC CLN55GP 55nm Multi Phase DLL - 520MHz-2600MHz

The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

3133

1.0

TSMC CLN55GP 55nm Spread Spectrum PLL - 130MHz-650MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

3134

1.0

TSMC CLN55GP 55nm Spread Spectrum PLL - 260MHz-1300MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

3135

1.0

TSMC CLN55GP 55nm Spread Spectrum PLL - 520MHz-2600MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

3136

1.0

TSMC CLN55LP 55nm Clock Generator PLL - 120MHz-600MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

3137

1.0

TSMC CLN55LP 55nm Clock Generator PLL - 240MHz-1200MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

3138

1.0

TSMC CLN55LP 55nm Clock Generator PLL - 60MHz-300MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

3139

1.0

TSMC CLN55LP 55nm DDR DLL - 104MHz-520MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

3140

1.0

TSMC CLN55LP 55nm DDR DLL - 164MHz-820MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

3141

1.0

TSMC CLN55LP 55nm DDR DLL - 78MHz-390MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

3142

1.0

TSMC CLN55LP 55nm Deskew PLL - 120MHz-600MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

3143

1.0

TSMC CLN55LP 55nm Deskew PLL - 240MHz-1200MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

3144

1.0

TSMC CLN55LP 55nm Deskew PLL - 60MHz-300MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

3145

1.0

TSMC CLN55LP 55nm General Purpose PLL - 120MHz-600MHz

The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...

3146

1.0

TSMC CLN55LP 55nm Multi Phase DLL - 120MHz-600MHz

The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

3147

1.0

TSMC CLN55LP 55nm Multi Phase DLL - 240MHz-1200MHz

The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

3148

1.0

TSMC CLN55LP 55nm Multi Phase DLL - 60MHz-300MHz

The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

3149

1.0

TSMC CLN55LP 55nm Spread Spectrum PLL - 120MHz-600MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

3150

1.0

TSMC CLN55LP 55nm Spread Spectrum PLL - 240MHz-1200MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

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