Silicon Library Inc. IP Cores

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3301

1.0

TSMC CLN90G 90nm Clock Generator PLL - 320MHz-1600MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

3302

1.0

TSMC CLN90G 90nm Clock Generator PLL - 80MHz-400MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

3303

1.0

TSMC CLN90G 90nm DDR DLL - 124MHz-620MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

3304

1.0

TSMC CLN90G 90nm DDR DLL - 196MHz-980MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

3305

1.0

TSMC CLN90G 90nm DDR DLL - 93MHz-465MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

3306

1.0

TSMC CLN90G 90nm Deskew PLL - 160MHz-800MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

3307

1.0

TSMC CLN90G 90nm Deskew PLL - 320MHz-1600MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

3308

1.0

TSMC CLN90G 90nm Deskew PLL - 80MHz-400MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

3309

1.0

TSMC CLN90G 90nm General Purpose PLL - 160MHz-800MHz

The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...

3310

1.0

TSMC CLN90G 90nm Multi Phase DLL - 160MHz-800MHz

The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

3311

1.0

TSMC CLN90G 90nm Multi Phase DLL - 320MHz-1600MHz

The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

3312

1.0

TSMC CLN90G 90nm Multi Phase DLL - 80MHz-400MHz

The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

3313

1.0

TSMC CLN90G 90nm Spread Spectrum PLL - 160MHz-800MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

3314

1.0

TSMC CLN90G 90nm Spread Spectrum PLL - 320MHz-1600MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

3315

1.0

TSMC CLN90G 90nm Spread Spectrum PLL - 80MHz-400MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

3316

1.0

TSMC CLN90GOD 90nm Clock Generator PLL - 110MHz-550MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

3317

1.0

TSMC CLN90GOD 90nm Clock Generator PLL - 220MHz-1100MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

3318

1.0

TSMC CLN90GOD 90nm Clock Generator PLL - 440MHz-2200MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

3319

1.0

TSMC CLN90GOD 90nm DDR DLL - 129MHz-645MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

3320

1.0

TSMC CLN90GOD 90nm DDR DLL - 172MHz-860MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

3321

1.0

TSMC CLN90GOD 90nm DDR DLL - 272MHz-1360MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

3322

1.0

TSMC CLN90GOD 90nm Deskew PLL - 110MHz-550MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

3323

1.0

TSMC CLN90GOD 90nm Deskew PLL - 220MHz-1100MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

3324

1.0

TSMC CLN90GOD 90nm Deskew PLL - 440MHz-2200MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

3325

1.0

TSMC CLN90GOD 90nm General Purpose PLL - 220MHz-1100MHz

The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...

3326

1.0

TSMC CLN90GOD 90nm Spread Spectrum PLL - 110MHz-550MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

3327

1.0

TSMC CLN90GOD 90nm Spread Spectrum PLL - 220MHz-1100MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

3328

1.0

TSMC CLN90GOD 90nm Spread Spectrum PLL - 440MHz-2200MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

3329

1.0

TSMC CLN90GT 90nm Clock Generator PLL - 125MHz-625MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

3330

1.0

TSMC CLN90GT 90nm Clock Generator PLL - 250MHz-1250MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

3331

1.0

TSMC CLN90GT 90nm Clock Generator PLL - 500MHz-2500MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

3332

1.0

TSMC CLN90GT 90nm DDR DLL - 159MHz-795MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

3333

1.0

TSMC CLN90GT 90nm DDR DLL - 212MHz-1060MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

3334

1.0

TSMC CLN90GT 90nm DDR DLL - 335MHz-1675MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

3335

1.0

TSMC CLN90GT 90nm Deskew PLL - 125MHz-625MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

3336

1.0

TSMC CLN90GT 90nm Deskew PLL - 250MHz-1250MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

3337

1.0

TSMC CLN90GT 90nm Deskew PLL - 500MHz-2500MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

3338

1.0

TSMC CLN90GT 90nm General Purpose PLL - 250MHz-1250MHz

The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...

3339

1.0

TSMC CLN90GT 90nm Spread Spectrum PLL - 125MHz-625MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

3340

1.0

TSMC CLN90GT 90nm Spread Spectrum PLL - 250MHz-1250MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

3341

1.0

TSMC CLN90GT 90nm Spread Spectrum PLL - 500MHz-2500MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

3342

1.0

TSMC CLN90LP 90nm Clock Generator PLL - 120MHz-600MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

3343

1.0

TSMC CLN90LP 90nm Clock Generator PLL - 240MHz-1200MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

3344

1.0

TSMC CLN90LP 90nm Clock Generator PLL - 60MHz-300MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

3345

1.0

TSMC CLN90LP 90nm DDR DLL - 104MHz-520MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

3346

1.0

TSMC CLN90LP 90nm DDR DLL - 164MHz-820MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

3347

1.0

TSMC CLN90LP 90nm DDR DLL - 78MHz-390MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

3348

1.0

TSMC CLN90LP 90nm Deskew PLL - 120MHz-600MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

3349

1.0

TSMC CLN90LP 90nm Deskew PLL - 240MHz-1200MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

3350

1.0

TSMC CLN90LP 90nm Deskew PLL - 60MHz-300MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

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