Design & Reuse
5926 IP
4501
0.0
UMC L28HPC 28nm Ultra PLL - 15MHz-3000MHz
The Ultra PLL is designed with a state-of-the-art architecture using high-speed digital and analog circuits that offers exceptional performance, featu...
4502
0.0
UMC L28HPC+ 28nm Clock Generator PLL - 180MHz-900MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
4503
0.0
UMC L28HPC+ 28nm Clock Generator PLL - 360MHz-1800MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
4504
0.0
UMC L28HPC+ 28nm Clock Generator PLL - 720MHz-3600MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
4505
0.0
UMC L28HPC+ 28nm DDR DLL - 165MHz-825MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4506
0.0
UMC L28HPC+ 28nm DDR DLL - 220MHz-1100MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4507
0.0
UMC L28HPC+ 28nm DDR DLL - 347MHz-1735MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4508
0.0
UMC L28HPC+ 28nm Deskew PLL - 180MHz-900MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4509
0.0
UMC L28HPC+ 28nm Deskew PLL - 360MHz-1800MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4510
0.0
UMC L28HPC+ 28nm Deskew PLL - 720MHz-3600MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4511
0.0
UMC L28HPC+ 28nm General Purpose PLL - 360MHz-1800MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...
4512
0.0
UMC L28HPC+ 28nm IoT PLL - 60MHz-900MHz
The IoT PLL is designed for very low power, sipping only 45uW at 30MHz and running from core power. It has a wide frequency range with multiplication ...
4513
0.0
UMC L28HPC+ 28nm Multi Phase DLL - 180MHz-900MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
4514
0.0
UMC L28HPC+ 28nm Multi Phase DLL - 360MHz-1800MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
4515
0.0
UMC L28HPC+ 28nm Multi Phase DLL - 720MHz-3600MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
4516
0.0
UMC L28HPC+ 28nm Spread Spectrum PLL - 154MHz-771MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
4517
0.0
UMC L28HPC+ 28nm Spread Spectrum PLL - 308MHz-1540MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
4518
0.0
UMC L28HPC+ 28nm Spread Spectrum PLL - 618MHz-3090MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
4519
0.0
UMC L28HPC+ 28nm Ultra PLL - 15MHz-3000MHz
The Ultra PLL is designed with a state-of-the-art architecture using high-speed digital and analog circuits that offers exceptional performance, featu...
4520
0.0
UMC L28HPC+LVT 28nm Clock Generator PLL - 225MHz-1125MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
4521
0.0
UMC L28HPC+LVT 28nm Clock Generator PLL - 450MHz-2250MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
4522
0.0
UMC L28HPC+LVT 28nm Clock Generator PLL - 900MHz-4500MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
4523
0.0
UMC L28HPC+LVT 28nm DDR DLL - 195MHz-975MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4524
0.0
UMC L28HPC+LVT 28nm DDR DLL - 260MHz-1300MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4525
0.0
UMC L28HPC+LVT 28nm DDR DLL - 411MHz-2055MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4526
0.0
UMC L28HPC+LVT 28nm Deskew PLL - 225MHz-1125MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4527
0.0
UMC L28HPC+LVT 28nm Deskew PLL - 450MHz-2250MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4528
0.0
UMC L28HPC+LVT 28nm Deskew PLL - 900MHz-4500MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4529
0.0
UMC L28HPC+LVT 28nm General Purpose PLL - 450MHz-2250MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...
4530
0.0
UMC L28HPC+LVT 28nm Multi Phase DLL - 225MHz-1125MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
4531
0.0
UMC L28HPC+LVT 28nm Multi Phase DLL - 450MHz-2250MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
4532
0.0
UMC L28HPC+LVT 28nm Multi Phase DLL - 900MHz-4500MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
4533
0.0
UMC L28HPC+LVT 28nm Spread Spectrum PLL - 192MHz-964MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
4534
0.0
UMC L28HPC+LVT 28nm Spread Spectrum PLL - 386MHz-1930MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
4535
0.0
UMC L28HPC+LVT 28nm Spread Spectrum PLL - 772MHz-3860MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
4536
0.0
UMC L28HPC+LVT 28nm Ultra PLL - 15MHz-3000MHz
The Ultra PLL is designed with a state-of-the-art architecture using high-speed digital and analog circuits that offers exceptional performance, featu...
4537
0.0
UMC L28HPCLVT 28nm Clock Generator PLL - 220MHz-1100MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
4538
0.0
UMC L28HPCLVT 28nm Clock Generator PLL - 220MHz-1100MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
4539
0.0
UMC L28HPCLVT 28nm Clock Generator PLL - 440MHz-2200MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
4540
0.0
UMC L28HPCLVT 28nm Clock Generator PLL - 440MHz-2200MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
4541
0.0
UMC L28HPCLVT 28nm Clock Generator PLL - 880MHz-4400MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
4542
0.0
UMC L28HPCLVT 28nm Clock Generator PLL - 880MHz-4400MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
4543
0.0
UMC L28HPCLVT 28nm DDR DLL - 180MHz-900MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4544
0.0
UMC L28HPCLVT 28nm DDR DLL - 180MHz-900MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4545
0.0
UMC L28HPCLVT 28nm DDR DLL - 240MHz-1200MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4546
0.0
UMC L28HPCLVT 28nm DDR DLL - 240MHz-1200MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4547
0.0
UMC L28HPCLVT 28nm DDR DLL - 379MHz-1895MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4548
0.0
UMC L28HPCLVT 28nm DDR DLL - 379MHz-1895MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4549
0.0
UMC L28HPCLVT 28nm Deskew PLL - 220MHz-1100MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4550
0.0
UMC L28HPCLVT 28nm Deskew PLL - 220MHz-1100MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...