Design & Reuse
337 IP
101
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Gigabit Ethernet MAC SystemVerilog OVM VIP
Gigabit Ethernet Media Access Control (MAC) SystemVerilog OVM VIP is fully documented, off-the-shelf component for the Developers of the Gigabit Ether...
102
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MIPI D-PHY Rx IP, Silicon Proven in SMIC 55LL
The D-PHY specification, version 1.2, is perfectly complied with by the MIPI D-PHY Analog RX IP Core. Supported protocols include the Display Serial I...
103
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12.5G Multiprotocol Serdes IP, Silicon Proven in UMC 28HPC
The multi-protocol SerDes PHY consists of Serial ATA (SATA) conforming with SATA 3.0 Specification, Peripheral Component Interconnect Express (PCIe) c...
104
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HDMI - Display Port Combo PHY IP, Silicon Proven in TSMC 28HPC+
The DisPlay Port/HDMI/DVI Receiver is a high performance combo PHY with Display Port Receiver and HDMI Receiver. In DisPlay Port mode, the receiver is...
105
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Compact area 14bit IQ High Speed 10.3bit ENOB High performance Silicon Proven DAC IP Core
The 14-bit IQ High Speed 10.3 bit ENOB DAC IP Core employs a high-performance architecture and provides an optional differential current output or dif...
106
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MIPI M-PHY v4.1 IP, Silicon Proven in TSMC 12FFC
The MIPI M-PHY Gear 4 IP is compliant with the latest MIPI Feature Storage IP Solution SerDes PHY Product Brief Alliance M-PHY v4.1 Specification, Uni...
107
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NeoX Ultra-low-power RISC-V based GPU Processor
NEOX™ is a parallel multicore and multithreaded GPU architecture based on the RISC-V RV64C ISA instruction set with adaptive NoC. The number of ...
108
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eDisplay Port v1.4 Tx PHY & Controller IP, Silicon Proven in TSMC 22ULP
eDP/DP Tx PHY is designed for chips that perform eDP/DP data communication while operating at low power consumption. The main link is a multi-gigabit ...
109
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USB 3.0/ PCIe 2.0 Combo PHY IP, Silicon Proven in TSMC 28HPC+
The Combo PHY is a complete USB 3.0 and PCIe 2.0 PHY IP solution designed for a mobile and data consumer applications in TSMC 28nm process. It support...
110
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MIPI D-PHY Rx IP, Silicon Proven in GF 55LP
Version 1.2 of the D-PHY specification is fully complied with by the MIPI D-PHY Analog RX IP Core. Both the MIPI Camera Serial Interface (CSI-2) and D...
111
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DVB-S2X LDPC/BCH Decoder IP (Silicon Proven)
The DVB-S2/S LDPC/BCH decoder a silicon proven IP extracted from production chips has an octal input interface and a single output interface. The data...
112
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HDMI 1.4 Tx PHY & Controller IP, Silicon Proven in UMC 40SP
IP core for physical layer HDMI transmitters that fully complies with HDMI 1.4 specifications The HDMI transmitter PHY provides an easy-to-implement s...
113
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PCIe 2.0 Serdes PHY IP, Silicon Proven in TSMC 12FFC
A wide variety of PCIe 2.0 Base applications are available with PCIe 2.0 transceiver IP. It adheres to the PIPE 3.0 standard. In order to enable PCIe ...
114
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Display Port v1.4 Tx PHY & Controller IP, Silicon Proven in UMC 28HPC
The DisplayPort transmitter PHY version 1.4 supports data rates between 1.62Gbps (RBR) to 5.4Gbps (HBR2). built-in equalizer with programmable analogu...
115
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USB 3.2 Gen2 PHY IP, Silicon Proven in TSMC 7FF
The USB 3.2 Gen2X1 transceiver IP offers all USB 3.2 Gen2X1 host and peripheral applications up to 10Gbps. Both the UTMI+ and PIPE4.0 specifications a...
116
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PCIe 3.0 Serdes PHY IP, Silicon Proven in SMIC 14SFP
This Peripheral Component Interconnect Express (PCIe) x4 PHY is compliant with PCIe 3.0 Base Specification with support of PIPE 4.3 interface spec. Lo...
117
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NEMA I pico XS Ultra-low power 2D GPU
Minimal silicon area of only 0.11mm2 (@28nm), lowest MCU utilization of less than 5% and GPU power consumption of under 1mw, makes NEMA®|pico XS t...
118
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USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in SMIC 55LL
The combined PHY complies with the Peripheral Component Interconnect Express (PCIe), Serial ATA, USB, USB 3.0, and USB 2.0 interface protocols (USB Hi...
119
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MIPI C/D-PHY Combo Tx IP, Silicon Proven in TSMC 22 ULP
C-PHY/D-PHY Combo in numerous process nodes at low cost and power. To accommodate a range of applications, users can set this Combo PHY in either D-PH...
120
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HDMI 1.4 Rx PHY & Controller IP, Silicon Proven in TSMC 65/55LP
HDMI receiver PHY (Physical layer) is a single-port IP core which is fully compliant with HDMI 1.4 specification. This HDMI RX PHY supports from 25MHz...
121
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DDR4/ DDR3 Combo PHY IP - 2400Mbps (Silicon Proven in UMC 28HPC+)
The DDR4/3 PHY is compatible with JEDEC DDR3 and JEDEC DDR4 SDRAMs, supports a range of DDR3 DRAM speeds from 666Mbps to 2133Mbps and DDR4 DRAM speeds...
122
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Bluetooth LE v5.3 / Zigbee 3 RF/PHY for Global Foundry 55nm (Silicon proven IP)
The icyTRX ultra-low-power RF transceiver is designed to meet standards such as Bluetooth v5.3 Low Energy (Bluetooth Smart), 802.15.4 PHY Layer (e.g. ...
123
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PCIe 3.1 Serdes PHY IP, Silicon Proven in TSMC 40LP
PCIe Gen 3.1 transmission is supported by (PCIe 3.1) x4 PHY IP. With compatibility for PIPE 4.3 interface spec, this complies with PCIe Rev3 Base Spec...
124
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USB 2.0 PHY IP, Silicon Proven in TSMC 12FFC
The whole physical layer (PHY) IP solution for USB 2.0 was designed for outstanding performance and low power consumption. The High-Speed USB 2.0 Tran...
125
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USB 2.0 PHY IP, Silicon Proven in SMIC 14SF+
The USB2.0 PHY IP is a comprehensive physical layer (PHY) IP solution created for exceptional performance and low power consumption. The High-Speed US...
126
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IEEE 1394-1995 Link Layer Controller eVC - Fully documented, off the shelf component for Veisity's Specman Elite functional verification environment.
The IEEE 1394 -1995 link layer controller (from now on referred to only as 1394) provides connectionless acknowledged data transfer services between a...
127
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MIPI D-PHY Tx IP, Silicon Proven in SMIC 55LL
The MIPI D-PHY Analog TX IP Core fully complies with version 1.2 of the D-PHY specification. It is compatible with the MIPI Camera Serial Interface (C...
128
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V-by-One/ LVDS Tx IP, Silicon Proven in SMIC 40LL
The V-by-One® HS technology aims to transmit video signals at a high data rate using internal equipment connections. The requirements to create a tran...
129
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12bit 5Gsps silicon proven High performance Current Steering DAC IP Core
The 12-bit 5 GSPS DAC IP Core employs a high-performance current steering architecture and provides an optional differential current output or differe...
130
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USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in TSMC 28HPC+
The combination PHY comprises of a Serial ATA (SATA) compliant with the SATA 3.0 Specification, a Peripheral Component Interconnect Express (PCIe) com...
131
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Low Power 10bit 400KHz R2R High performance Silicon Proven DAC IP Core
The 10-bit 400KHz DAC IP Core employs a high-performance R2R architecture and provides an optional differential current output or differential voltage...
132
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MIPI D-PHY Tx IP, Silicon Proven in TSMC 16FFC
The MIPI D-PHY Tx IP Core is fully compliant with the D-PHY specification, version 1.2, ensuring adherence to industry standards. It offers compatibil...
133
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USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in SMIC 40LL
The combined PHY complies with the PIPE, Serial ATA, PCIe, USB, USB 3.0, USB 2.0, and PCIe Peripheral Component Interconnect Express interface protoco...
134
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USB 2.0 PHY IP, Silicon Proven in TSMC 16FFC
The entire physical layer (PHY) IP solution for USB 2.0 was created to provide exceptional performance and consume little power. The USB2.0 IP impleme...
135
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Networking SerDes IP, Silicon Proven in ST 28FDSOI
The 28 Gbps SerDes PHYs are comprehensive IP solutions that deliver enterprise-class performance across the challenging signaling environments typical...
136
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HDMI 1.4 Tx PHY & Controller IP, Silicon Proven in UMC 65/55ULP
IP core that completely conforms with HDMI 1.4 requirements for physical layer HDMI transmitters For consumer electronics like DVD player/recorders an...
137
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PCIe 2.0 Serdes PHY IP, Silicon Proven in TSMC 16FFC
The whole spectrum of PCIe 2.0 Base applications is offered by PCIe 2.0 transceiver IP. It adheres to the PIPE 3.0 standard. The PCIe 2.0 data rate at...
138
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JESD204B Tx-Rx PHY IP, Silicon Proven in TSMC 55LP
Full support for the JESD204B synchronous serial interface, compliant with the JESD204B.01 version specification, is provided via the JESD204B Tx-Rx P...
139
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Display Port v1.4 Tx PHY & Controller IP, Silicon Proven in UMC 40SP
Version 1.4 of the DisplayPort transmitter PHY is capable of transmitting data at rates of 1.62Gbps (RBR) to 5.4Gbps (HBR2). programmable analogue fea...
140
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USB 3.2 Gen2 PHY IP, Silicon Proven in TSMC 12FFC
All USB 3.2 Gen2X1 host and peripheral applications are supported up to 10Gbps by the USB 3.2 Gen2X1 transceiver IP. It complies with UTMI+ and PIPE4....
141
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PCIe 2.0 Serdes PHY IP, Silicon Proven in TSMC 28HPCP
The PCIe2.0 PHY IP is a fully - featured physical layer (PHY) IP solution for mobile and consumer applications. The PHY IP integrates mixed signal cir...
142
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XPHY Low power Chip to Chip SerDes IP, Silicon Proven in ST 28FDSOI
These IPs are targeted at applications requiring high speed, high bandwidth, low-power consumption, and low-latency interfaces....
143
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USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in SMIC 28SF
The combined PHY complies with USB (USB 3.0, USB 2.0), PCIe (Peripheral Component Interconnect Express), Serial ATA (SATA 3.0 Specification), and PIPE...
144
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MIPI C/D-PHY Combo Rx IP, Silicon Proven in TSMC 22 ULP
In order to use the least amount of power and money, several production nodes use C-PHY/D-PHY Combo. The Combo PHY can be set up by users in either D-...
145
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HDMI 1.4 Tx PHY & Controller IP, Silicon Proven in TSMC 65/55GP
Physical layer IP core for HDMI transmitters that complies exactly with HDMI 1.4 specifications The HDMI transmitter PHY provides a straight forward i...
146
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DDR3/ DDR2 Combo PHY IP - 1866Mbps (Silicon Proven in UMC 40LP)
The DDR3/2 PHY is compatible with JEDEC DDR3 and JEDEC DDR2 SDRAMs, supports a range of DDR3 DRAM speeds from 666Mbps to1866Mbps and DDR2 DRAM speeds ...
147
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Bluetooth LE v5.3 / IEEE 15.4 RF IP in TSMC 40nm & SMIC 55nm (Silicon proven IP)
Bluetooth Low Energy v5.3 and IEEE 802.15.4 (ZigBee 3) compliant RF Transceiver + Modem IP silicon proven in 55 & 40nm ULP, FLASH process nodes. T...
148
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USB 3.1 Gen1/Gen2 PHY IP, Silicon Proven in TSMC 28HPC+
This PHY IP supports both USB 3.1 Gen1 & Gen2. By providing a full on-chip physical transceiver solution with Electro Static Discharge (ESD) protectio...
149
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USB 2.0 PHY IP, Silicon Proven in TSMC 55LP
In order to deliver great performance and use little power, the whole physical layer (PHY) IP solution for USB 2.0 was developed. The High-Speed USB 2...
150
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LVDS/FPD Link IP, Silicon Proven in GF 65/55LPe
A transmitter for LVDS with a physical layer IP. This IP has 20 lanes (4 x 4D1C) of LVDS drivers and can handle 1.5Gbps of data rate. Both serial and ...