Design & Reuse
5757 IP
801
20.0
HDMI 2.0 RX 4P PHY 6Gbps in TSMC (28nm)
The Synopsys HDMI Receiver (RX) IP solutions are compliant with the High- Definition Multimedia Interface (HDMI) 2.0 and 1.4 specifications and provid...
802
20.0
HDMI 2.0 RX PHY
Silicon Library's HDMI 2.0 RX IP supports up to 6Gbps. This silicon proven IP is available in TSMC 12 / 40. Please also refer to our LINK IP....
803
20.0
HDMI 2.0 RX PHY in Samsung (8nm)
The Synopsys HDMI Receiver (RX) IP solutions are compliant with the High- Definition Multimedia Interface (HDMI) 2.0 and 1.4 specifications and provid...
804
20.0
HDMI 2.0 TX PHY
Silicon Library's HDMI 2.0 TX PHY IP supports up to 6Gbps. This silicon proven IP is available in TSMC 12. Please also refer to our LINK IP....
805
20.0
HDMI 2.0 TX PHY 6Gbps in SMIC (28nm)
The Synopsys HDMI Transmitter (TX) IP solutions are compliant with the HDMI 2.0 and 1.4 specifications, and provide the necessary logic to implement ...
806
20.0
HDMI 2.0 TX PHY 6Gbps in TSMC (28nm, 16nm, 12nm)
The Synopsys HDMI Transmitter (TX) IP solutions are compliant with the HDMI 2.0 and 1.4 specifications, and provide the necessary logic to implement ...
807
20.0
HDMI 2.0/MHL RX Combo 1P PHY 6Gbps in TSMC (28nm)
The Synopsys HDMI Receiver (RX) IP solutions are compliant with the High- Definition Multimedia Interface (HDMI) 2.0 and 1.4 specifications and provid...
808
20.0
HDMI 2.0/MHL TX Combo 6Gbps in TSMC (28nm)
The Synopsys HDMI Transmitter (TX) IP solutions are compliant with the HDMI 2.0 and 1.4 specifications, and provide the necessary logic to implement ...
809
20.0
HDMI 2.1 Audio PLL in Samsung (14nm)
The Synopsys HDMI 2.1 RX Controller and PHY IP solutions, compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide th...
810
20.0
HDMI 2.1 Audio PLL in TSMC (16nm, 12nm)
The Synopsys HDMI 2.1 RX Controller and PHY IP solutions, compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide th...
811
20.0
HDMI 2.1 eARC Rx PHY in GF (12nm)
The Synopsys HDMI 2.1 RX Controller and PHY IP solutions, compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide th...
812
20.0
HDMI 2.1 eARC RX PHY in TSMC (16nm, 12nm, N6)
The Synopsys HDMI 2.1 RX Controller and PHY IP solutions, compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide th...
813
20.0
HDMI 2.1 eARC Tx PHY in Samsung (14nm)
The Synopsys HDMI 2.1 RX Controller and PHY IP solutions, compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide th...
814
20.0
HDMI 2.1 eARC TX PHY in TSMC (16nm, 12nm)
The Synopsys HDMI 2.1 RX Controller and PHY IP solutions, compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide th...
815
20.0
HDMI 2.1 Rx PHY 12Gbps in Samsung (14nm)
The Synopsys HDMI 2.1 RX Controller and PHY IP solutions, compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide th...
816
20.0
HDMI 2.1 RX PHY 12Gbps in TSMC (16nm, 12nm)
The Synopsys HDMI 2.1 RX Controller and PHY IP solutions, compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide th...
817
20.0
HDMI 2.1 Tx PHY in GF (12nm)
The Synopsys HDMI 2.1 TX Controller and PHY IP solutions,compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide the...
818
20.0
HDMI 2.1 Tx PHY in Samsung (14nm)
The Synopsys HDMI 2.1 TX Controller and PHY IP solutions,compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide the...
819
20.0
Temperature Sensor Deep NWELL, TSMC N3EP
A high precision low power junction temperature sensor that has been developed to be easily embedded into digital ASIC designs. The block features an ...
820
20.0
VESA VDC-M V1.2 Decoder
Embrace the future of digital media with Arasan's VESA VDC-M v1.2 Decoder. Our groundbreaking product revolutionizes video compression technology, off...
821
20.0
VESA VDC-M Decoder
The Video Electronics Standards Association (VESA®) introduced the VESA Display Compression-M (VDC-M) standard, a new display interface compression st...
822
20.0
GF 6-bit, 10 GSPS Analog to Digital Converter (ADC) IP block GlobalFoundries 22nm
The A6B10G is a low-power, high-speed analog to digital converter (ADC) intellectual property (IP) design block. It is a flash-type ADC, with 6-bit re...
823
20.0
High Performance HBM, HBM3 Memory Controller
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...
824
20.0
High-Performance AES-GCM/CTR IP
The compact, high-performance Synopsys Pipelined AES-GCM/CTR Core implements the AES-GCM/CTR algorithm as specified in the National Institute of Stand...
825
20.0
High-Performance AES-XTS/ECB IP
Memory and storage security involves protecting storage resources and the data stored on them, both on-premises and in external data centers and the c...
826
20.0
MIPI C-PHY v1.0 D-PHY v1.2 RX 2 trios/2 Lanes in TSMC (12nm, N5)
Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...
827
20.0
MIPI C-PHY v1.0 D-PHY v1.2 RX 3 trios/4 Lanes in TSMC (16nm, 12nm, N7, N6, N5)
Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...
828
20.0
MIPI C-PHY v1.2 D-PHY v2.1 RX 2 trios/2 Lanes in TSMC (16nm, N6, N6C, N5)
Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...
829
20.0
MIPI C-PHY v1.2 D-PHY v2.1 RX 3 trios/4 Lanes in TSMC (16nm, 12nm, N7, N6, N5, N3P)
Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...
830
20.0
MIPI C-PHY v1.2 D-PHY v2.1 TX 2 trios/2 Lanes in TSMC (16nm, 12nm, N5)
Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...
831
20.0
MIPI CSI-2 host/device controllers for high-speed serial interface between image processor and camera sensors
Synopsys MIPI® IP solution enables low-power and high-performance interface between system-on-chips (SoCs), application processors, baseband processor...
832
20.0
MIPI CSI-2 Tansmitter v 1.3, C-PHY compatible
The MIPI Camera Serial Interface (CSI-2) Transmitter, typically resides in a mobile platform’s camera module, and communicates over a D-PHY/C-PHY link...
833
20.0
MIPI D-PHY ( DPHY ) 1.2 RX
Silicon Library's MIPI D-PHY ( DPHY ) 1.2 RX PHY IP supports data rates up to 1.5Gbps. This IP includes two PLLs. This silicon proven IP is available...
834
20.0
MIPI D-PHY ( DPHY ) 1.2 TX
Silicon Library's MIPI D-PHY ( DPHY ) 1.2 TX PHY IP supports data rates up to 1.5Gbps and 2.5Gbps per lane (in HS), depending on the technology node. ...
835
20.0
MIPI D-PHY Bidirectional 2 Lanes in GF (40nm, 28nm, 22nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
836
20.0
MIPI D-PHY Bidirectional 2 Lanes in SMIC (40nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
837
20.0
MIPI D-PHY Bidirectional 2 Lanes in TSMC (40nm, 28nm, 16nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
838
20.0
MIPI D-PHY Bidirectional 4 Lanes in Fujitsu (40nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
839
20.0
MIPI D-PHY Bidirectional 4 Lanes in GF (40nm, 28nm, 22nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
840
20.0
MIPI D-PHY Bidirectional 4 Lanes in SMIC (40nm, 28nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
841
20.0
MIPI D-PHY Bidirectional 4 Lanes in TSMC (40nm, 28nm, 16nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
842
20.0
MIPI D-PHY Rx-Only 2 Lanes in GF (28nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
843
20.0
MIPI D-PHY Rx-Only 2 Lanes in SMIC (40nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
844
20.0
MIPI D-PHY Rx-Only 2 Lanes in TSMC (40nm, 28nm, 22nm, 16nm, 12nm, N7, N6)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
845
20.0
MIPI D-PHY Rx-Only 2 Lanes in UMC (28nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
846
20.0
MIPI D-PHY Rx-Only 4 Lanes in GF (28nm, 12nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
847
20.0
MIPI D-PHY Rx-Only 4 Lanes in SMIC (40nm, 28nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
848
20.0
MIPI D-PHY Rx-Only 4 Lanes in TSMC (40nm, 28nm, 22nm, 16nm, 12nm, N7, N6)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
849
20.0
MIPI D-PHY Rx-Only 4 Lanes in UMC (28nm, 22nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
850
20.0
MIPI D-PHY Tx-Only 2 Lanes in TSMC (28nm, 22nm, 16nm, 12nm, N7, N6)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...