1 50.0

AHB Octal SPI Controller with PSRAM and XIP Support The Silvaco Octal SPI Memory Controller IP core is a serial peripheral interface (SPI) master which controls an external serial device, usually an ind...

2 50.0

Ultra High-Speed Cache Memory Compiler Silvaco’s Ultra High-Speed cache memory is an adaptable, independent, non-coherent cache Intellectual Property (IP) featuring an advanced cache ar...

3 25.0

I3C Advanced Controller, V1.1 I3C is a new a standard from the MIPI Alliance that unifies and extends the legacy interfaces of I2C and SPI and adds new powerful features to sup...

4 25.0

I3C Advanced Controller, V1.1 Lite The I3C Advanced Controller Lite is a highly configurable I3C controller that can be used in microcontroller-based environments to provide I3C con...

5 25.0

I3C Advanced Target, V 1.1 Lite The I3C Advanced Target Lite is a highly configurable I3C Target that can be used in microcontroller based environments to provide I3C connectivit...

6 25.0

I3C Advanced Target, V1.1 The I3C Advanced Target is a highly configurable I3C Target that can be used in microcontroller based environments to provide I3C connectivity to ...

7 25.0

I3C Autonomous Target, V1.1 The I3C Autonomous Target is intended for simple, data acquisition types of applications where a microprocessor is not needed to process the data....

8 25.0

LDO Voltage Regulator 250 mA, TSMC N3P The LDO IP is a 1.2V low-quiescent-current adjustable output voltage Low-Drop-Out (LDO) Linear Regulator implemented in the TSMC 3nm N3P CMOS process ...

9 25.0

LDO Voltage Regulator Adjustable 0.45 V to 0.9 V Output, 30 mA The LDO IP is a 1.2V low-quiescent-current adjustable output voltage Low-Drop-Out (LDO) Linear Regulator implemented in the TSMC 3nm N3P CMOS process ...

10 25.0

LINFlexD Controller The LINFlexD Controller is a serial communication interface designed for Local Interconnect Network (LIN) applications. The LINFlexD manages a high nu...

11 25.0

FlexCAN Controller The FlexCAN controller is a highly configurable, synthesizable core implementing the CAN protocol (ISO 11898-1), CAN with Flexible Data rate (CAN FD),...

12 25.0

FlexRay Controller The FlexRay Controller fully complies with FlexRay Communication System Protocol Specification, Version 2.1, Revision A. It implements the specificati...

13 25.0

MultiCAN Controller Since its introduction in the mid-1980s, the Controller Area Network (CAN) has become a standard network protocol for automotive applications. Cars ma...

14 10.0

AHB Multi Fabric The AHB Fabric provides the necessary infrastructure to connect up to 16 shared AHB Slaves to up to 16 AHB-Lite Bus Masters. The off-the-self configu...

15 10.0

AHB QSPI Controller with Execute in Place (XIP) The Quad Serial Peripheral Interface (OSPI) core is a serial data link (SPI) master which controls an external serial FLASH device. Reading and wri...

16 10.0

AXI QSPI with Execute in Place The Quad Serial Peripheral Interface module either controls a serial data link as a master, or reacts to a serial data link as a slave. The IPC...

17 0.0

M8051EW/W Controller The M8051EW and M8051W microcontroller cores are high performance versions of the popular 8051 8-bit microcontroller. The M8051EW includes an On-Chip ...

18 0.0

Bandgap Voltage Reference 0.45 V Output, Low PPM/°C The Bandgap Voltage Reference IP is a 1.0 V input, low PPM/°C, 0.45 V reference voltage output implemented in the TSMC 3nm N3P CMOS process technology...

19 0.0

IEEE 1149.7 Compact TAP The IEEE 1149.7 Compact TAP from Silvaco provides an IEEE 1149.7-compliant Test Access Port (TAP), enabling you to take advantage of IEEE 1149.7 featu...

20 0.0

AHB 4 Channel DMA Controller The DMA is a multiple-channel direct memory access controller. The DMA IP Core is a Verilog HDL design that can be used in ASIC, Structured ASIC and F...

21 0.0

AHB AES with DMA The Advanced Encryption Standard (AES) IP Core is a complete hardware implementation encryption/decryption algorithm described in the U.S. Government ...

22 0.0

AHB Arbiter The AHB Arbiter arbitrates for the AHB bus among as many as four AHB masters. The AHB Arbiter implements a round-robin arbitration algorithm to AHB M...

23 0.0

AHB Channel with Decoder and Data Mux The AHB Channel provides the necessary infrastructure to connect as many as 7 AHB Slaves (numbered 1-7) to an AHB bus Master. The AHB Channel perform...

24 0.0

AHB External Bus Interface The AHB External Bus Interface (EBI) allows a CPU or AHB Master (such as a DMA core) to transmit and receive data to an external device such as an ext...

25 0.0

AHB Lite to AXI Bridge The AHB Lite to AXI Bridge translates an AHB Lite bus transaction (read or write) to an AXI bus transaction. It is expected that the AXI clock and the...

26 0.0

AHB Low Power Subsystem - ARM Cortex M0 The AHB Low Power Subsystem is an AMBA® based system that is useful as the basic digital infrastructure for building low power SOCs. The subsystem co...

27 0.0

AHB Parallel Flash Controller The AHB Parallel Flash Controller allows an AHB Master (usually a CPU) to read, program, or erase the connected arrangement of external parallel Super...

28 0.0

AHB Performance Subsystem - ARM Cortex M0 The AHB Performance Subsystem is an AMBA® based system that is useful as the digital infrastructure for building low power SOCs needing additional per...

29 0.0

AHB Performance Subsystem - ARM Cortex M3 The AHB Performance Subsystem is an AMBA® based system that is useful as the digital infrastructure for building low power SOCs needing additional per...

30 0.0

AHB Secure Subsystem - ARM Cortex M3 The Silvaco Secure AHB Performance Subsystem is a high-performance AHB subsystem that allows for a high level of hardware and software security. It in...

31 0.0

AHB Single Channel DMA Controller The DMA is a configurable single channel direct memory access controller. The DMA IP Core is a Verilog HDL design that can be used in ASIC, Structured...

32 0.0

AHB Slave to SPI Master The AHB-Lite to SPI Bridge is used to translate 32-bit AHB-Lite Writes and Reads to Writes and Reads over a SPI interface. A custom 32-bit protocol i...

33 0.0

AHB SRAM Controller The AHB SRAM Controller provides a standard AHB interface to translate AHB bus reads and writes into reads and writes with the signaling and timing of...

34 0.0

AHB TFT LCD Controller w/ DMA The AHB TFT LCD Controller is a configurable core that interfaces to an AHB or generic microprocessor bus and provides all the timing control and pixe...

35 0.0

AHB to APB Bus Bridge The AHB to APB Bridge translates an AHB bus transaction (read or write) to an APB bus transaction. This is accomplished via two small state machines ...

36 0.0

AHB-Lite to AHB-Lite Asynchronous Bridge The AHB-Lite to AHB-Lite Asynchronous Bridge translates an AHB-Lite bus transaction (read or write) on one clock domain to an AHB-Lite bus transacti...

37 0.0

ColdFire® V1 Core Flexis™ family controllers from Freescale Semiconductor, the world’s leading provider of 32-bit embedded controllers, provide the link between 8-bit e...

38 0.0

ColdFire® V1 Platform The ColdFire V1 Platform is a fully configurable microcontroller subsystem built from the same ColdFire V1 32-bit processor IP that is implemented in ...

39 0.0

ColdFire® V2 Core Freescale Semiconductor is the world’s leading provider of 32-bit controllers and processors based on Freescale’s ColdFire® Architecture have been dep...

40 0.0

ColdFire® V2 Core & SPP 5208 Building upon the 68K foundation, ColdFire offers RISC performance with industry-leading code density and a rich set of connectivity peripherals. By s...

41 0.0

ColdFire® V2 Core & SPPC1 Building upon the 68K foundation, ColdFire offers RISC performance with industry-leading code density and a rich set of connectivity peripherals. By s...

42 0.0

ColdFire® V4 Core The V4 ColdFire Processor Core is a high-performance implementation of the ubiquitous ColdFire architecture from Freescale Semiconductor, offering ove...

43 0.0

ColdFire® V4 Core & SPP The ColdFire V4 Processor is a high-performance implementation of the ubiquitous ColdFire architecture from Freescale Semiconductor, offering over 500...

44 0.0

ColdFire® V4 Core & SPP C1 The ColdFire V4 SPPC1 Processor Platform combines the ColdFire V4 Core with industry-proven platform peripherals to form a complete high-performance m...

45 0.0

ColdFire® V4 Core & SPP C2 The ColdFire V4 SPPC2 Processor Platform combines the ColdFire V4 Core with industry-proven platform peripherals to form a complete high-performance m...

46 0.0

APB Channel with Decoder and Data Mux The APB Channel provides the necessary infrastructure to connect as many as 16 AHB Slaves (numbered 0-15) to an APB Bus Master. The APB Channel perfo...

47 0.0

APB General Purpose IO (w/ interrupt) The APB GPIO is a configurable module allowing the use of up to 32 scalable I/O lines. If more than 32 I/Os are required, more than one GPIO module m...

48 0.0

APB I2C Master/Slave Controller The I2C Interface provides full support for the two-wire I2C synchronous serial interface, compatible with the ACCESS Bus physical layer, with additio...

49 0.0

APB Interrupt Controller The interrupt controller monitors interrupts from all other modules within the system and issues interrupt requests to the processor when necessary. T...

50 0.0

APB Pulse Width Modulator The APB PWM Module is a standard APB peripheral that generates a programmable duty cycle output signal. The frequency of the output waveform is eithe...