51 0.0

APB Pulse Width Modulator The APB PWM Module is a standard APB peripheral that generates a programmable duty-cycle output signal. The frequency of the output waveform is either...

52 0.0

APB Real Time Clock The Real Time Clock (RTC) is a clock-calendar IP core that keeps track of the “Time of Day”. The core is organized as a series of BCD counters that c...

53 0.0

APB Timer The APB Timer module is a sixteen-bit down counter with a selectable prescaler. Prescale values of 1, 16 and 256 can be selected. The prescaler exte...

54 0.0

APB to AHB-Lite Asynchronous Bridge The APB to AHB-Lite Asynchronous Bridge translates an APB bus transaction (read or write) on one clock domain to an AHB-Lite bus transaction on a seco...

55 0.0

APB UART 16550 The IPC-UART is a 16450/16550 compatible Universal Asynchronous Receiver/Transmitter (UART). The core contains a baud rate generator that can be confi...

56 0.0

APB Windowed Watchdog Timer The Watchdog Timer is useful in monitoring the condition where a CPU and software get into an unrecoverable unknown or “stuck” state. Software period...

57 0.0

SPI to AHB Lite Bridge The ISPI Slave to AHB Lite Master is commonly used as a monitor interface to allow external devices to access the internal AHB bus. A SPI Slave to ...

58 0.0

SPI to AXI Bridge The AHB Lite to AXI Bridge translates an AHB Lite bus transaction (read or write) to an AXI bus transaction. It is expected that the AXI clock and th...

59 0.0

Standard Cell Libraries, GF 55nm Silvaco’s Standard Cell libraries deliver thousands of highly optimized cells with each one being optimized for power, area, speed, routing, and yield...

60 0.0

Standard Cell Library Low Voltage Operation 0.45 V Silvaco’s low voltage Standard Cell Library for the TSMC N3P process represents a breakthrough in power efficiency for high performance SoC designs. A...

61 0.0

AXI Interconnect Fabric The AXI Interconnect provides the necessary infrastructure to connect as many as 8 shared AXI Slaves to as many as 4 AXI Bus Masters. AXI defines 5...

62 0.0

AXI to AHB Lite Bus Bridge The AHB Lite to AXI Bridge translates an AHB Lite bus transaction (read or write) to an AXI bus transaction. It is expected that the AXI clock and th...

63 0.0

AXI to APB Bus Bridge The AXI to APB Bridge translates an AXI bus transaction (read or write) to an APB bus transaction. This is accomplished via two state machines – one ...

64 0.0

AXI64 5 Port SRAM Controller The AXI 5-Master component SRAM Controller provides 5 AXI 64-bit Master components with low-wait-state access to a single internal 64-bit SRAM resourc...

65 200.0

MACsec Engine, 1G to 100G Single-Port The MACsec-IP-160 is a versatile MACsec solution for silicon devices that require plug-and-play MACsec processing for an Ethernet port at full line ra...

66 200.0

MACsec Engine, 1G to 25G, Full Duplex, Integrated As part of Rambus' award-winning silicon Intellectual Property (IP) product portfolio, the EIP-165 is a high-performance, split ingress/egress in-line...

67 200.0

MACsec Engine, 1G to 50G Single-Port, with TSN support The MACsec-IP-161 is a versatile MACsec solution for silicon devices that require plug-and-play MACsec processing for an Ethernet port at full line ra...

68 200.0

MACsec Engine,10M-25G Single-Port, ISO 26262 Compliant with xMII Interface The MACsec-IP-362 consists of the Rambus MACsec-IP-162 (a single-port line-rate MACsec engine with FIFO interface and optional preemption) and xMII in...

69 200.0

MACsec Engine,10M-50G Single-Port with xMII Interface and TSN Support The MACsec-IP-361 is a plug-and-play solution for adding MACsec on the xMII side of an Ethernet subsystem. It is ISO 26262 ASIL-B Ready certified and ...

70 200.0

UALink IP Solution with PHY, Controller and Verification IP The Synopsys UALink IP solution, consisting of UALink Controller, PHY, and verification IP, is designed to meet the performance requirements for AI Ac...

71 200.0

HBM4 Memory Controller The Rambus HBM4 Controller Core is designed for use in applications requiring high memory bandwidth and low latency including AI/ML, HPC, advanced dat...

72 200.0

CC-6xx CryptoManager Core The Rambus CryptoManager Core CC-6xx is a standalone symmetric cipher-only subsystem of the CryptoManager Hub CH-6xx. The CC-6xx products are designed...

73 200.0

CC-7xx CryptoManager Core The automotive-grade Rambus CryptoManager Core CC-7xx family is a standalone symmetric cipher-only subsystem of the CryptoManager Hub CH-7xx. The CC-7...

74 200.0

ICE-IP-338 High-speed XTS-GCM Multi Stream Inline Cipher Engine The Protocol-IP-338 (EIP-338) is a scalable, high-performance, multi-stream cryptographic engine that offers XTS and GCM modes of operation for the AE...

75 200.0

ICE-IP-358 High-speed XTS-GCM Multi Stream Inline Cipher Engine, DPA resistant The Protocol-IP-338 (EIP-338) is a scalable, high-performance, multi-stream cryptographic engine that offers XTS and GCM modes of operation for the AE...

76 200.0

PCIe 7.0 Controller The Rambus PCI Express® (PCIe®) 7.0 Controller is a configurable and scalable design for ASIC implementations. It is backward compatible to the PCIe 6...

77 200.0

GDDR7 Memory Controller The Rambus GDDR7 controller core is designed for use in applications requiring high memory throughput including graphics, high performance computing (...

78 200.0

CH-6xx CryptoManager Hub The Rambus CryptoManager Hub CH-6xx is the next generation of flexible and configurable cryptographic family of accelerator cores. CH-6xx designs targ...

79 200.0

CH-7xx CryptoManager Hub The automotive-grade CryptoManager Hub (CMH) from Rambus is the next-generation of flexible and configurable cryptographic family of accelerator cores...

80 200.0

MIPI C-PHY/D-PHY Combo CSI-2 RX+ IP (6.0Gsps/trio, 4.5Gbps/lane) in TSMC N6 The MXL-CDPHY-6p0G-CSI-2-RX+-T-N6 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificat...

81 200.0

MIPI C-PHY/D-PHY Combo RX+ IP (4.5Gsps/4.5Gbps) in TSMC N5 The MXL-CD-PHY-CSI-RX+-T-N05 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification ...

82 200.0

MIPI C-PHY/D-PHY Combo Universal IP (8.0Gsps/trio, 6.5Gbps/lane) in TSMC 16FFC The MXL-CDPHY-UNIV-8p0G-T-16FFC is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificatio...

83 200.0

Compute Express Link (CXL) 3.1 Controller The Rambus Compute Express Link® (CXL®) 3.1 controller is a parameterizable design for ASIC and FPGA implementations. It leverages the Rambus PCIe® 6....

84 200.0

LPDDR Combo Controller - LPDDR4X/4 & LPDDR5T/5X/5 The Rambus LPDDR4 and LPDDR5 combo controller core is designed for use in applications requiring high memory throughput at low power including mobile,...

85 200.0

LPDDR5T / LPDDR5X / LPDDR5 Controller The Rambus LPDDR5 Controller supporting LPDDR5T, LPDDR5X, LPDDR5 controller core is designed for use in applications requiring high memory throughput ...

86 200.0

True Random Number Generator The EIP-76 TRNG is an advanced hardware based, technology independent True Random Number Generator. Security is now a basic requirement for all device...

87 200.0

RT-6xx CryptoManager Root of Trust The Rambus CryptoManager RT-6xx v3 Root of Trust (CMRT) family from is the latest generation of fully programmable FIPS 140-3 compliant hardware secur...

88 200.0

RT-7xx CryptoManager Root of Trust The Rambus automotive-grade CryptoManager RT-7xx v3 Root of Trust family is the next generation of fully programmable ISO 26262 and ISO 21434 complian...

89 195.0

PCIe 7.0 Retimer Controller The Rambus PCI Express® (PCIe®) 7.0 Retimer Controller provides a complete digital data path solution that delivers best-in-class latency, power and a...

90 195.0

PCIe 7.0 Switch The Rambus PCI Express® (PCIe®) 7.0 Switch is a customizable, multiport embedded switch for PCIe designed for ASIC and FPGA implementations. It enable...

91 190.0

PCIe 6.1 Controller The Rambus PCI Express® (PCIe®) 6.1 Controller is a configurable and scalable design for ASIC implementations. It is backward compatible to the PCIe 5...

92 190.0

PCIe 6.2 Switch The Rambus PCI Express® (PCIe®) 6.2 Switch is a customizable, multiport embedded switch for PCIe designed for ASIC implementations. It enables the con...

93 190.0

MIPI CSI-2 Controller Core V2 The Rambus CSI-2 Controller Core V2 is the second generation CSI-2 controller core. It is further optimized for high performance, low power and small ...

94 190.0

MIPI DSI-2 Controller Core The Rambus DSI-2 Controller Core is the second generation DSI controller core. It is further optimized for high performance, low power and small size....

95 180.0

HBM3E / HBM3 Memory Controller The Rambus HBM3E/3 Controller Cores are designed for use in applications requiring high memory throughput, low latency and full programmability. T...

96 180.0

PCIe 5.0 Controller supporting Endpoint, Root Port, Switch, Bridge and advanced features Rambus PCIe 5.0 Controller is a configurable and scalable PCIe controller Soft IP designed for ASIC and FPGA implementation. Rambus PCIe 5.0 Controlle...

97 180.0

GDDR6 Memory Controller Rambus GDDR6 Controller Core is designed for use in applications requiring high memory throughput, high clock rates and full programmability. The ...

98 180.0

Quantum Safe Engine (QSE) Quantum Safe Cryptography acceleration to protect data and devices in the quantum computing era...

99 180.0

Multi-Protocol Crypto Engine with Classification The EIP-197 is a family of high speed Cryptographic Accelerators with embedded Classification Engine, Virtualization, Latency compensation to maintain...

100 180.0

Multi-Protocol Engine with Classifier, Look-Aside, 5-10 Gbps The Protocol-IP-196 Multi-Protocol Engine is a protocol-aware packet engine for accelerating IPSec, SSL/TLS, DTLS, 3GPP and MACsec up to 10 Gbps in mu...