2151 1.0

TSMC CLN90GOD 90nm Clock Generator PLL - 220MHz-1100MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2152 1.0

TSMC CLN90GOD 90nm Clock Generator PLL - 440MHz-2200MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2153 1.0

TSMC CLN90GOD 90nm DDR DLL - 129MHz-645MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2154 1.0

TSMC CLN90GOD 90nm DDR DLL - 172MHz-860MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2155 1.0

TSMC CLN90GOD 90nm DDR DLL - 272MHz-1360MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2156 1.0

TSMC CLN90GOD 90nm Deskew PLL - 110MHz-550MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2157 1.0

TSMC CLN90GOD 90nm Deskew PLL - 220MHz-1100MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2158 1.0

TSMC CLN90GOD 90nm Deskew PLL - 440MHz-2200MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2159 1.0

TSMC CLN90GOD 90nm General Purpose PLL - 220MHz-1100MHz The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...

2160 1.0

TSMC CLN90GOD 90nm Spread Spectrum PLL - 110MHz-550MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2161 1.0

TSMC CLN90GOD 90nm Spread Spectrum PLL - 220MHz-1100MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2162 1.0

TSMC CLN90GOD 90nm Spread Spectrum PLL - 440MHz-2200MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2163 1.0

TSMC CLN90GT 90nm Clock Generator PLL - 125MHz-625MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2164 1.0

TSMC CLN90GT 90nm Clock Generator PLL - 250MHz-1250MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2165 1.0

TSMC CLN90GT 90nm Clock Generator PLL - 500MHz-2500MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2166 1.0

TSMC CLN90GT 90nm DDR DLL - 159MHz-795MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2167 1.0

TSMC CLN90GT 90nm DDR DLL - 212MHz-1060MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2168 1.0

TSMC CLN90GT 90nm DDR DLL - 335MHz-1675MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2169 1.0

TSMC CLN90GT 90nm Deskew PLL - 125MHz-625MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2170 1.0

TSMC CLN90GT 90nm Deskew PLL - 250MHz-1250MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2171 1.0

TSMC CLN90GT 90nm Deskew PLL - 500MHz-2500MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2172 1.0

TSMC CLN90GT 90nm General Purpose PLL - 250MHz-1250MHz The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...

2173 1.0

TSMC CLN90GT 90nm Spread Spectrum PLL - 125MHz-625MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2174 1.0

TSMC CLN90GT 90nm Spread Spectrum PLL - 250MHz-1250MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2175 1.0

TSMC CLN90GT 90nm Spread Spectrum PLL - 500MHz-2500MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2176 1.0

TSMC CLN90LP 90nm Clock Generator PLL - 120MHz-600MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2177 1.0

TSMC CLN90LP 90nm Clock Generator PLL - 240MHz-1200MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2178 1.0

TSMC CLN90LP 90nm Clock Generator PLL - 60MHz-300MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2179 1.0

TSMC CLN90LP 90nm DDR DLL - 104MHz-520MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2180 1.0

TSMC CLN90LP 90nm DDR DLL - 164MHz-820MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2181 1.0

TSMC CLN90LP 90nm DDR DLL - 78MHz-390MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2182 1.0

TSMC CLN90LP 90nm Deskew PLL - 120MHz-600MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2183 1.0

TSMC CLN90LP 90nm Deskew PLL - 240MHz-1200MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2184 1.0

TSMC CLN90LP 90nm Deskew PLL - 60MHz-300MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2185 1.0

TSMC CLN90LP 90nm General Purpose PLL - 120MHz-600MHz The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...

2186 1.0

TSMC CLN90LP 90nm Spread Spectrum PLL - 120MHz-600MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2187 1.0

TSMC CLN90LP 90nm Spread Spectrum PLL - 240MHz-1200MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2188 1.0

TSMC CLN90LP 90nm Spread Spectrum PLL - 60MHz-300MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2189 1.0

Stereo PCM to PWM Converter, SMIC 0.18um The AR35S18E is a digitally coded conversion IP that translates stereo 16-24bit pulse-code modulated (PCM) input data into pulse-width modulated (PWM)...

2190 1.0

RTP / UDP / IP Hardware Stack for H.264/H.265 NAL Video Streams Packet Processing The Digital Blocks DB-RTP-UDP-IP-NAL IP Core is a RTP/UDP/IP Protocol Hardware Stack with MAC Layer Pre- & Post-Processors and an ARP Packet Processor...

2191 1.0

RTP / UDP / IP Hardware Stack for Raw, Uncompressed RGB/YUV Video Streams The Digital Blocks DB-RTP-UDP-IP-AV IP Core is a RTP/UDP/IP Protocol Hardware Stack with MAC Layer Pre- & Post-Processors and an ARP Packet Processor ...

2192 1.0

Super-Fast 8051 Microcontroller Core with Configurable Features and Peripherals The S8051XC3 IP core implements a high-performance, low-energy, 8-bit microcontroller that executes the MCS®51 instruction set and includes a configur...

2193 1.0

Super-Speed Plus USB 3.2 Hub Controller USB3.2 SuperSpeed Hub The Super Speed Plus USB bus is implemented as a separate dual-simplex dual lane data path consisting of two uni-directional di...

2194 0.3729

A bridge to convert the slave SPI interface to the master I2C interface and vice versa The dti_spi_to_i2c is a bridge to convert the slave SPI interface to the master I2C interface and vice versa....

2195 0.3729

A bridge to convert the slave SPI interface to the master UART interface and vice versa The dti_spi_to_uart is a bridge to convert the slave SPI interface to the master UART interface and vice versa....

2196 0.3729

A memory BIST solution which has been optimized for Dolphin memories Dolphin Technology now provides a memory BIST solution which has been optimized for Dolphin memories. It supports all Dolphin memory compilers, includ...

2197 0.3729

2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, supports process G/LV Memory Compilers...

2198 0.3729

2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, supports process GC Memory Compilers...

2199 0.3729

2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FF Memory Compilers...

2200 0.3729

2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FF Memory Compilers...