Design & Reuse
Catalog of SIP Cores
System on Chip design resources
4905 IP
1501
1.0
HDMI1.4 Receiver PHY
Innosilicon HDMI RX IP is designed to receive and recover the video and audio data from an HDMI source device for display applications. Innosilicon H...
1502
1.0
HDMI1.4 Transmitter IP
Innosilicon HDMI TX IP is designed for transmitting video and audio data from a video source device to a display device, which is compatible with HDMI...
1503
1.0
HDMI2.0 Receiver PHY
Innosilicon HDMI RX IP is designed to receive and recover the video and audio data from an HDMI source device for display applications. Innosilicon H...
1504
1.0
HDMI2.0 Receiver PHY & Controller
Innosilicon HDMI RX IP is composed of the digital controller, the PHY logic and physical layer. The digital controller receives video, audio, synchron...
1505
1.0
HDMI2.0 TX Controller
Innosilicon HDMI TX Controller is designed for transmitting video and audio data from a video source device to a display device, which is compatible w...
1506
1.0
HDMI2.0 TX PHY
Innosilicon HDMI TX IP is designed for transmitting video and audio data from a video source device to a display device, which is compatible with HDMI...
1507
1.0
HDMI2.0/1.4 RX PHY & Controller
Innosilicon HDMI RX IP is designed to receive and recover the video and audio data from a HDMI source device for display applications, which is compat...
1508
1.0
HDMI2.0/1.4 TX PHY & Controller
Innosilicon HDMI TX IP is designed for transmitting video and audio data from a video source device to a display device, which is compatible with HDMI...
1509
1.0
HDMI2.1 Transmitter PHY & Controller
Innosilicon HDMI TX IP is designed for transmitting video and audio data from a video source device to a display device, which is compatible with HDMI...
1510
1.0
HDMI2.1 TX Controller
Innosilicon HDMI TX Controller is designed for transmitting video and audio data from a video source device to a display device, which is compatible w...
1511
1.0
HDMI2.1 TX PHY
Innosilicon HDMI TX PHY IP is designed for transmitting video and audio data from a video source device to a display device, which is compatible with ...
1512
1.0
5G Multi-SerDes For PCIe2.0/USB3.0 PHY
The Innosilicon 5Gbps SERDES PHY is a highly configurable PHY capable of supporting speeds up to 5Gbps within a single lane. For this datasheet, the P...
1513
1.0
8G Multi-SerDes For PCIe3.0/USB3.0 PHY
The Innosilicon 8Gbps SERDES PHY is a highly configurable PHY capable of supporting speeds up to 8Gbps within a single lane. For this datasheet, the P...
1514
1.0
Wireline Transceiver
This IP can be used for BPSK RF communication through a signal wire. Originally it was designed for use with V1 USB PD. However, it is a generic block...
1515
1.0
PLL for TSMC 130nm LP
The OT3122t130 is a flexible clock multiplier PLL function with a wide range of input and output frequencies and is designed for the TSMC 0.13µ LP or ...
1516
1.0
Core Voltage Regulator
The OT1104 is a CMOS 75mA on-chip core voltage regulator designed for use when a pin for an external decoupling capacitor is not available. A source...
1517
1.0
Low Dropout Linear Regulator
The OT1105t180 is a 150mA CMOS low dropout regulator designed for use in a wide variety of mixed signal device applications. It is designed for use wi...
1518
1.0
Low Power Clock Multiplier PLL for 40nm TSMC ULP CMOS
The OT3135 is a flexible low power clock multiplier PLL function with a wide range of input and output frequencies, and is designed for TSMC 40nm, ULP...
1519
1.0
Power On Reset
The OT0403 is a CMOS general purpose POR for 3.3V. It provides a minimum 8uS reset pulse with power rise times of 0 to infinity. It also provide a bro...
1520
1.0
DP/eDP1.4/1.2 RX PHY
Innosilicon DP RX PHY is designed to receive and recover the video, audio and auxiliary data from a DP or eDP source device for display applications. ...
1521
1.0
DP/eDP1.4/1.2 TX PHY&controller
Innosilicon eDP TX PHY is designed to transmit video, audio, and auxiliary data from a system host device to a display device for display applications...
1522
1.0
LPDDR4X/4 Combo PHY & Controller
The INNOSILICON DDR IPTM Mixed-Signal LPDDR4 PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compatible SDRAM devi...
1523
1.0
LPDDR4X/4/3 Combo PHY & Controller
The INNOSILICON DDR IPTM Mixed-Signal LPDDR4X/4/3 PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compatible SDRAM...
1524
1.0
LPDDR5, LPDDR4X, LPDDR4 Combo PHY & Controller
The INNOSILICON DDR IPTM Mixed-Signal LPDDR5/4/4X COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compatible...
1525
1.0
USB 2.0 DRD Controller
Innosilicon USB2.0 DRD Controller provides a USB2.0-compliant host/device controller solution. This controller can be programmed to support data trans...
1526
1.0
USB 3.0 DRD Controller
Innosilicon USB3.0 DRD Controller provides a USB3.0-compliant host/device controller solution. This controller can be programmed to support data trans...
1527
1.0
USB2.0 OTG PHY
The INNO USB 2.0 PHY conforms to the specification of UTMI+ level 3 Revision 1.0 (USB 2.0 Transceiver Macrocell Interface Plus) and has excellent perf...
1528
1.0
USB2.0/eUSB2.0 PHY & Controller
USB is the ubiquitous interconnect standard of choice for a wide range of computing and consumer applications. Innosilicon provides a comprehensive se...
1529
1.0
USB3.1/3.0 PHY & Controller
The Innosilicon USB3.0 PHY is a highly programmable module that processes high-speed serial data to parallel data compatible with the PHY Interface fo...
1530
1.0
USB3.2 PHY & Controller
INNOSILICON™ USB3.2 Controller and PHY IP is a highly customizable IP module that converts high-speed serial data into parallel data, and is compliant...
1531
0.3729
A bridge to convert the slave SPI interface to the master I2C interface and vice versa
The dti_spi_to_i2c is a bridge to convert the slave SPI interface to the master I2C interface and vice versa....
1532
0.3729
A bridge to convert the slave SPI interface to the master UART interface and vice versa
The dti_spi_to_uart is a bridge to convert the slave SPI interface to the master UART interface and vice versa....
1533
0.3729
A memory BIST solution which has been optimized for Dolphin memories
Dolphin Technology now provides a memory BIST solution which has been optimized for Dolphin memories. It supports all Dolphin memory compilers, includ...
1534
0.3729
2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, supports process G/LV
Memory Compilers...
1535
0.3729
2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, supports process GC
Memory Compilers...
1536
0.3729
2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FF
Memory Compilers...
1537
0.3729
2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FF
Memory Compilers...
1538
0.3729
2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FF+GL/FF+LL/FFC
Memory Compilers...
1539
0.3729
2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FF/FF+
Memory Compilers...
1540
0.3729
2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FF/P
Memory Compilers...
1541
0.3729
2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FF/P
Memory Compilers...
1542
0.3729
2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FFC/FFC+
Memory Compilers...
1543
0.3729
1.2V Temperarure sensor (0.5 degree C accuracy) - TSMC 5nm 5FF
Dolphin's interface IP for standard I/O and specialty I/O delivers ultra high performance for DDR1/2/3/4, LPDDR2/3, DDR PHY, LVDS, LVPECL, I2C, PCI, S...
1544
0.3729
1.2V/1.8V Capable General Purpose IO (GPIO) (CDM5A/7A-ESD) - TSMC 3nm
Dolphin's interface IP for standard I/O and specialty I/O delivers ultra high performance for DDR1/2/3/4, LPDDR2/3, DDR PHY, LVDS, LVPECL, I2C, PCI, S...
1545
0.3729
1.2V/1.8V Capable General Purpose IO (GPIO) (CDM5A/7A-ESD) - TSMC 4nm 4FF/4P
Dolphin's interface IP for standard I/O and specialty I/O delivers ultra high performance for DDR1/2/3/4, LPDDR2/3, DDR PHY, LVDS, LVPECL, I2C, PCI, S...
1546
0.3729
1.2V/1.8V Capable General Purpose IO (GPIO) (CDM5A/7A-ESD) - TSMC 5nm 5FF
Dolphin's interface IP for standard I/O and specialty I/O delivers ultra high performance for DDR1/2/3/4, LPDDR2/3, DDR PHY, LVDS, LVPECL, I2C, PCI, S...
1547
0.3729
1.2V/1.8V I2C (CDM5A/7A-ESD) - TSMC 3nm
Dolphin's interface IP for standard I/O and specialty I/O delivers ultra high performance for DDR1/2/3/4, LPDDR2/3, DDR PHY, LVDS, LVPECL, I2C, PCI, S...
1548
0.3729
1.2V/1.8V I2C (CDM5A/7A-ESD) - TSMC 4nm 4FF/4P
Dolphin's interface IP for standard I/O and specialty I/O delivers ultra high performance for DDR1/2/3/4, LPDDR2/3, DDR PHY, LVDS, LVPECL, I2C, PCI, S...
1549
0.3729
1.2V/1.8V I2C (CDM5A/7A-ESD) - TSMC 5nm 5FF
Dolphin's interface IP for standard I/O and specialty I/O delivers ultra high performance for DDR1/2/3/4, LPDDR2/3, DDR PHY, LVDS, LVPECL, I2C, PCI, S...
1550
0.3729
1.2V/1.8V/2.5V Capable Fail Safe General Purpose IO (GPIO) (CDM5A/7A-ESD) - TSMC 3nm
Dolphin's interface IP for standard I/O and specialty I/O delivers ultra high performance for DDR1/2/3/4, LPDDR2/3, DDR PHY, LVDS, LVPECL, I2C, PCI, S...