Design & Reuse
909 IP
751
0.0
Interlaken IP
Interlaken interface provides full support for the Interlaken synchronous serial interface, compatible with Interlaken version 1.2 specification. Thro...
752
0.0
CoaXPress (CXP) Verification IP
CXP Verification IP implements digital interface for high speed image data transmission and intended mainly for Machine Vision applications. The inter...
753
0.0
SoC Compiler
Front-end SoC Creation Has Never Been So EasyThrough a unified database with different APIs, Defacto's SoC Compiler enables a cost-effective front...
754
0.0
Noesis Technologies - SoC Design Services
Noesis Technologies can offer expert ASIC, FPGA and DSP development resources to get your product in the market quickly. Our highly skilled enginee...
755
0.0
Toggle Flash Memory Model
Toggle Flash provides an smart way to verify the Toggle Flash host controller or Toggle Flash memory model of a SOC or a ASIC. The SmartDV s Toggle Fl...
756
0.0
Logic Fruit Technologies - SoC design services
Based in Gurgaon, India, Logic Fruit Technologies designs and deploys embedded solutions for customers around the world. The company has specific expe...
757
0.0
Lossless JPEG Decoder
The LJPEG-D core is a matching decoder for the LJPEG-E Lossless JPEG encoder from Alma Technologies and supports up to 16-bit per component Numericall...
758
0.0
Lossless JPEG Encoder - Up to 16-bit per Component Numerically Lossless Image & Video Compression
The LJPEG-E core from Alma Technologies implements the Lossless JPEG compression in a very compact, high-performance and stand-alone package. It suppo...
759
0.0
Low Dropout (LDO) Capless Regulator
The ODT-LDO-IC-300M-7 is a low dropout (LDO), linear regulator for integration in a SoC. The LDO uses advanced control techniques to achieve excellent...
760
0.0
Low Pin Count (LPC) controller verification IP
The Low Pin Count (LPC) interface is a low bandwidth bus with up to 33 MHz performance. It is used to connect peripherals around the CPU and to replac...
761
0.0
Up to 50% main memory bandwidth acceleration
The Ziptilion Bandwidth IP accelertes the main memory bandwidth with up to 50%. The IP core packages a novel and proprietary technology that accelerat...
762
0.0
VP8 Decoder IP
VP8 Decoder core is compliant with VP-8 standard specification. Through its compatibility, it provides a simple interface to a wide range of low-cost ...
763
0.0
VP8 Encoder IP
VP8 Encoder core is compliant with VP-8 standard specification. Through its compatibility, it provides a simple interface to a wide range of low-cost ...
764
0.0
LPC Device IP
SmartDV’s LPC (Low Pin Count) Device IP is a silicon-proven solution designed to enable reliable, low-bandwidth communication between embedded control...
765
0.0
LPC Host IP
SmartDV’s LPC (Low Pin Count) Host IP is a silicon-proven solution that enables efficient communication with LPC-compliant peripheral devices. Designe...
766
0.0
FPD-Link (Flat Panel Display Link) Verification IP
FPD-Link Verification IP is fully compliant with Standard FPD Link I, II and III. It includes an extensive test suite covering most of the possible sc...
767
0.0
LPDDR Controller IP
LPDDR is full-featured, easy-to-use, synthesizable design, compatible with JESD209A-1 and JESD209B specification. Through its LPDDR compatibility, it ...
768
0.0
LPDDR2 Controller IP
LPDDR2 interface provides full support for the LPDDR2 interface, compatible with JESD209-2E and JESD209-2F specification. Through its LPDDR2 compatibi...
769
0.0
LPDDR3 Controller IP
SmartDV’s LPDDR3 Controller IP offers a high-performance and low-latency solution for integrating LPDDR3 memory interfaces into SoCs and FPGA-based sy...
770
0.0
LPDDR4 Controller IP
SmartDV’s LPDDR4 Controller IP is a high-performance solution designed to enable fast, power-efficient memory access in mobile, automotive, and high-p...
771
0.0
LPDDR5 Controller IP
SmartDV’s LPDDR5 Controller IP delivers high-bandwidth, low-latency memory access optimized for next-generation mobile, automotive, and AI/ML applicat...
772
0.0
LPDDR5X Controller IP
LPDDR5X is full-featured, easy-to-use, synthesizable design, compatible with LPDDR5X draft JEDEC specification and DFI-version 5.0 specification Compl...
773
0.0
LPDDR5X Memory Model
LPDDR5X Memory Model provides an smart way to verify the LPDDR5X component of a SOC or a ASIC. The SmartDV s LPDDR5X memory model is fully compliant w...
774
0.0
SPDIF (IEC60958) Verification IP
SPDIF Verification IP provides an smart way to verify the SPDIF component of a SOC or a ASIC. The SmartDV s SPDIF Verification IP is fully compliant w...
775
0.0
SPDIF IP
The SmartDV SPDIF IIP Core is full-featured, easy-to-use, synthesizable design that is easily integrated into any SOC or FPGA development. The SPDIF I...
776
0.0
MPEG2 Decoder IP
MPEG2 Decoder core is compliant with MPEG-2 standard specification. Through its compatibility, it provides a simple interface to a wide range of low-c...
777
0.0
MPEG2 Encoder IP
MPEG2 Encoder core is compliant with MPEG-2 standard specification. Through its compatibility, it provides a simple interface to a wide range of low-c...
778
0.0
MPEG4 Decoder IP
MPEG4 Decoder core is compliant with MPEG-4 standard specification. Through its compatibility, it provides a simple interface to a wide range of low-c...
779
0.0
MPEG4 Encoder IP
MPEG4 Encoder core is compliant with MPEG-4 standard specification. Through its compatibility, it provides a simple interface to a wide range of low-c...
780
0.0
Open Core Protocol (OCP) Verification IP
OCP : Asiczen Technologies has its IP verification for OCP (Open core protocol). OCP is one of the system Bus protocol verification IP. The system bus...
781
0.0
Open LVDS Display Interface (OpenLDI) Verification IP
Open LVDS Display Interface(OpenLDI) specification was developed through the cooperation of companies in the semiconductor, display, computer system, ...
782
0.0
Open Nand Flash Interface (ONFI) Verification IP
ONFI (Open Nand Flash Interface) provides an smart way to verify the ONFI host controller or ONFI Flash memory model of a SOC or a ASIC. The SmartDV s...
783
0.0
FPGA Proven PCIe GEN6 Controller
PCIe GEN6 Controller IP Delivers data speed up to 64GT/s (Gigatransfers per second) per lane. Multi-channel packet processing and enhanced RAS capabil...
784
0.0
SphinX - AES-XTS encryption/decryption IP
SphinX is designed to accommodate the speed, latency and throughput requirements of computer systems main memory. The IP implements the standard (NIST...
785
0.0
SPI Master IP
SPI Master is full-featured, easy-to-use, synthesizable design, compatible with SPI Block Guide 4.01 Complient. Through its SPI Master compatibility, ...
786
0.0
SPI NAND Flash Memory Model
SPI Nand Flash Memory Model provides an smart way to verify the SPI Nand Flash protocols.It can work with Verilog HDL environment and works with all V...
787
0.0
SPI Slave IP
SPI Slave interface provides full support for the both three and four wire SPI synchronous serial interface, compatible with SPI specification SPI Blo...
788
0.0
SPI Slave To AHB Bridge IP
SPI Slave To AHB Bridge interface provides full support for the two-wire SPI synchronous serial interface, compatible with SPI version Block Guide 4.0...
789
0.0
SPI Slave To AXI Bridge IP
SPI Slave To AXI Bridge interface provides full support for the two-wire SPI synchronous serial interface, compatible with SPI version Block Guide 4.0...
790
0.0
SPI Slave To SOC Bridge IP
SPI Slave To SOC Bridge interface provides full support for the two-wire SPI synchronous serial interface, compatible with SPI version Block Guide 4.0...
791
0.0
SPI/EEPROM Verification IP
SPI/EEPROM Verification IP provides an smart way to verify the serial synchronous communication protocol.The SmartDV s SPI/EEPROM Verification IP is f...
792
0.0
SPI/RTC Verification IP
SPI/RTC (Real time counter) Verification IP provides an smart way to verify the serial synchronous communication protocol.The SmartDV s SPI/RTC Verifi...
793
0.0
GPIO IP
GPIO provides general purpose input output interface with AXI, AHB, Avalon and APB, compatible with standard protocol of GPIO specifications. Through ...
794
0.0
SPIStack Verification IP
SPIStack is the serial synchronous communication protocol based Flash VIP, supporting all major SPIStack vendors. SPIStack Verification IP can be used...
795
0.0
IPMB Verification IP
IPMB Verification IP provides an smart way to verify the IPMB two-wire bus. The SmartDV s IPMB Verification IP is fully compliant with version 1.0 and...
796
0.0
CPRI Controller IP
SmartDV’s CPRI (Common Public Radio Interface) Controller IP is a silicon-proven, high-performance solution tailored for high-speed data transmission ...
797
0.0
CPRI verification IP
MAXVY provides configurable CPRI TX/RX verification IP. MAXVY’s CPRI verification IP is fully compatible with CPRI version v7.0 with backward compatib...
798
0.0
SR-IOV Verification IP
SRIOV Verification IP provides an smart way to verify the PCIE bi-directional bus. The SmartDV s SRIOV Verification IP is fully compliant with version...
799
0.0
CRAM Memory Model
CRAM Memory Model provides an smart way to verify the CRAM component of a SOC or a ASIC. The SmartDV s CRAM memory model is fully compliant with stand...
800
0.0
DRAM Memory Model - Synthesizable
Synthesizable DRAM Model of GDDR5,GDDR6 & DDR4 for emulation platform / test chip development and memory controller performance measurement. ...