1 0.0

SFA 350A - Sondrel Quad-channel ADAS Platform The SFA 350A platform has been specifically designed for ADAS (Advanced Driver Assistance Systems) that are used to support driverless or automotive v...

2 200.0

Post-Quantum Cryptography - xQlave® PQC ML-KEM (Kyber) In a world where advances in quantum computing threaten traditional cryptographic systems, Xiphera’s xQlave® ML-KEM (Kyber) Key Encapsulation Mechanis...

3 130.0

LPDDR6, LPDDR5X Combo PHY & Controller INNOSILICON™ introduces its LPDDR6/5X PHY and Controller IP, purpose-built for the AI era’s high-performance chip design needs. This solution is fully...

4 105.0

CME IoT platform Sensor-Mate (sensing node)Long distance wireless communication (920MHz)Sensor-Gateway (Aggregator)920MHz wireless module (CM Engineering proprietary)G...

5 100.0

MACsec - Extreme-speed - Security Protocol MACsec is a point-to-point protocol located on layer two (Data Link) of the OSI model. Xiphera's comprehensive MACsec solution portfolio safeguards th...

6 100.0

PCIe 5.0 PHY & Controller The Innosilicon Gen1/2/3/4/5 PCI Express Controller provides a PCI Express Root Complex (RC) and Endpoint (EP) application. It’s a high performance, h...

7 100.0

Post-Quantum Cryptography - nQrux® Secure Boot - Quantum-Secure Authenticated Boot (PQC) nQrux® Secure Boot enhances system security by enabling quantum-secure authenticated boot, crucial for verifying the authenticity and integrity of bin...

8 100.0

Post-Quantum Cryptography - xQlave® PQC ML-DSA (Dilithium) The xQlave® ML-DSA (Dilithium) Digital Signature Algorithm IP core secures critical infrastructures and operations against the threat of quantum compu...

9 100.0

LPDDR5X, LPDDR5, LPDDR4X, LPDDR4 Combo PHY & Controller The INNOSILICON™ LPDDR IP includes a LPDDR5X/5/4X/4 Combo PHY and controller. It is fully compliant with the JEDEC standard. Optimized for low-power a...

10 80.0

GDDR7 PHY & Controller The INNOSILICON™ GDDR7 PHY is fully compliant with the JEDEC GDDR7 standard, supporting data rates of up to 32 Gbps in PAM3 mode. In PAM3 mode, each b...

11 60.0

UCIe Chiplet PHY & Controller INNOSILICON™ UCIe Chiplet IP offers a customizable solution for seamless, low-latency data transfer between silicon dies and chips, enabling heterogen...

12 51.0

TLS 1.3 - Security Protocol Transport Layer Security (TLS) is a cryptographic protocol used for building a secure connection between a client and a server over the Internet. A ha...

13 51.0

True Random Number Generator (TRNG) The TRNG IP core establishes a benchmark for hardware-based security in cryptographic systems, by generating high-entropy, true random numbers essenti...

14 50.0

MAXVY Technologies MAXVY is a fast growing fabless semiconductor company which is currently engaged in the fields of RTL design and Verification IP Solutions. We offe...

15 50.0

AES - GCM - Extreme-speed variant XIP1113E is a an extreme-speed IP core implementing the Advanced Encryption Standard (AES) in Galois Counter Mode (GCM). AES-GCM is a widely used cryp...

16 50.0

IPsec - Security Protocol IPsec (Internet Protocol Security) is a widely implemented protocol to secure communications across the Internet. Xiphera’s IPsec core enhances secure...

17 48.0

nQrux® Crypto Module Xiphera’s nQrux® Crypto Module IP core provides a comprehensive security platform that allows for customisation of top-notch cryptographic services, s...

18 43.0

Elliptic Curve Cryptography (ECC) Accelerator The high-speed ECC Accelerator reaches to more than a thousand operations per second in a modern FPGA or ASIC. Furthermore, it covers all NIST P curve...

19 25.0

2.5Gbps Per Lane MIPI-CSI2 Compliant Serial Video Receiver The SVRPlus supports a clock lane and 4 data lanes, each lane featuring at up to 2.5Gbps, for a total of 10Gbps. The highly parallel architecture ...

20 25.0

HBM4, HBM3E PHY & Controller INNOSILICON™ HBM4/3E IP is fully compliant with the JEDEC standard for HBM3E and the preliminary specification for HBM4. The IP includes a customizabl...

21 25.0

DDR5, DDR4 Combo PHY & Controller The INNOSILICON DDR IPTM Mixed-Signal DDR5/4 Combo PHY s provide turnkey physical interface solutions for ICs requiring access to JEDEC compatible SDR...

22 15.0

2.5Gbps Per Lane MIPI-CSI2 Compliant Serial Video Transmitter The SVTPlus supports a clock lane and 4 data lanes, each lane featuring at up to 2.5Gbps, for a total of 10Gbps. The highly parallel architecture of t...

23 15.0

GDDR6X, GDDR6 Combo PHY & Controller The INNOSILICON™ GDDR6X/6 PHY is fully compliant with the JEDEC GDDR6X/6 standard, supporting data rates of up to 20 Gbps per pin for PAM2 GDDR6 mode ...

24 15.0

High Performance Second Generation Extended MIPI CSI2 Receiver Latest and forthcoming CMOS image sensors surpass 10M pixels, and output video at 30 and even 60 fps. This development requires high bandwidth betwe...

25 15.0

MIPI CSI2 rev 2.0 transmitter/controller for FPGA, with 8 lanes and 2.5Gbps per lane The SVTPlus-CSI2-F is a second generation MIPI CSI2-Tx transmitter IP core for FPGA implementations. It complies with MIPI® CSI2 V2.0 and DPHY1.2 spec...

26 15.0

Multi-Video-Source Multiplexing Serial Video Transmitter for MIPI CSI2 The SVT-CS4AP2 supports MIPI CSI2 over MIPI D-PHY. It allows mutilplexing of up to 10 video sources into a CSI2 output stream...

27 15.0

Extended MIPI CSI2 Serial Video Receiver, 64 bits, 8 data lanes, 4 pixels/clock Latest and forthcoming CMOS image sensors surpass 10M pixels, and output video at 30 and even 60 fps. This development requires high bandwidth betwe...

28 13.0

Multiplexing transceiver with 4 CSI2 inputs and a single CSI2 output This IP multiplexes inputs from up to 4 CSI2 cameras, each with up to 4 data lanes, to a single CSI2 output stream, with up to 4 lanes. It comprises o...

29 10.0

MIPI DSI-2 Transmitter Interface IP MIPI DSI-2 (Display Serial Interface) defines an interface between a peripheral device (camera) and host processor (application engine) for mobile dev...

30 8.0

MIPI I3C Verification IP with IBI feature enabled The Maxvy's MIPI-I3C VIP provides configurable option to select I3C master/secondary master/slave based on the MIPI I3C DUT function as per user speci...

31 8.0

Universal Chiplet Interconnect Express (UCIe) Verification IP MAXVY UCIe VIP , a state-of-the-art solution that offers a comprehensive set of features and capabilities to ensure the quality and performance of you...

32 7.0

Hardware NLM (Non-Local-Mean) Video Noise Reduction IP core NLM (Non Local Mean) is a noise reduction algorithm wherein the value of each pixel is determined a rectangle of pixels around that pixel (a “center p...

33 5.0

MIPI I3C Master RISC-V based subsystem RISC-V based MAXVY MIPI I3C master interface has been developed to ease sensor system design architectures in mobile wireless products by providing a ...

34 5.0

MIPI SPMI Target Controller The System Power Management Interface is a two wire interface that connects the integrated power controller (PC) of a System-on-Chip (SoC) processor s...

35 5.0

MIPI-I3C Combo Host and Target interface controller IP for Sensor and Peripheral connection The MIPI I3C (Improved Inter Integrated circuit) is a two wire bidirectional Serial Bus for sensor communication. The MIPI I3C interface has been ...

36 5.0

MIPI-I3C Combo IP Host/Target HDR-DDR compliance with Spec v1.1.1 MIPI I3C(Improved Inter Integrated Circuit) is a two-wire bidirectional serial Bus for sensors communication. The MIPI I3C interface has been develope...

37 4.0

32 bit 8Ksps sigma delta ADC for Seismic Precision application in TSMC 180nm 32-bit delta sigma analog-to-digital converter (ADC) containing a low noise programmable gain amplifier (PGA) and 2 channel input multiplexers. This A...

38 4.0

12b 5Msps ADC for microcontroller business in UMC 40nm AD12BSAR5M40LP is a 12-bit Successive Approximation Analog-to-Digital Converter (ADC) that operates up to 5MS/s. The ADC has excellent linearity with ...

39 4.0

12b, 5Gsps, 0.9/1.8V Self Calibrating, Current steering DAC for 5G in TSMC 28nm DA12B5000M28HPC is high performance 12b current steering DAC that supports data rate up-to 5Gsps. DAC core consists of a current source matrix with qu...

40 4.0

12b, 5Gsps, 0.9/1.8V Self Calibrating, Current steering DAC for 5G in UMC 28nm DA12CS5GU28HPCP is high performance 12b current steering DAC that supports data rate up-to 5Gsps. DAC core consists of a current source matrix with qu...

41 4.0

14b, 1.3Gsps, 40MHz BW ADC in TSMC 28nm AD14B40M28HPC is a wide band continuous time sigma delta ADC with -80dBc of dynamic range in 40Mhz bandwidth. The ADC comprises of a continuous time s...

42 4.0

14b, 2Gsps, Self-Calibrating Current Steering IQDAC in samsung 8nm for 5G & WIFI6 DAIQ14CS2G08NLL is high performance 14b current steering IQDAC that supports data rate up-to 2Gsps. Each DAC core consists of a current source matrix ...

43 4.0

14b, 3.2Gsps, 75MHz BW ADC for RADAR in 28nm AD14B75M28HPC is a wide band continuous time sigma delta ADC with -80dBc of dynamic range in 75Mhz bandwidth. The ADC comprises of a continuous time s...

44 4.0

14b, 4Gsps, Self-Calibrating Current Steering IQ DAC for 5G & WIFI6 in samsung 8nm DAIQ14CS4G08NLL is high performance 14b current steering IQDAC that supports data rate up-to 4Gsps. Each DAC core consists of a current source matrix ...

45 4.0

16-bit, 5MS/s ADC for Microcontroller Business in UMC40nm AD16BSAR5M40LP is a 16-bit Successive Approximation Analog-to-Digital Converter (ADC) that operates up to 5MS/s. The ADC achieves full 16bit linearity...

46 4.0

18-bit Sigma Delta Stereo Audio Analog-to-Digital Converter IP in TSMC 28nm AD18SD28HPC is a complete low-cost stereo analog to digital converter for digital audio applications. The ADC comprises of a continuous time sigma del...

47 4.0

Low-drift voltage precision reference 6ppm accurate for PLC, Precision data acquisitions system REF2V5L6PPMT180 is Reference that contains two parts, precision reference voltage generator and reference output voltage (REFOUT) buffer. It offers an...

48 4.0

Dual channel 12-bit, 1GS/s ADC in Samsung 8nm for 5G & WIFI6 ADIQ12B1G08NLL is a Dual channel 12-bit analog-to-digital converter (ADC) that operates up to 1GS/s. This ADC samples wide bandwidth analog signals wi...

49 4.0

Dual channel 12-bit, 4GS/s ADC IP for 5G in 8nm process ADIQ12B4G08NLL is a Dual channel 12-bit analog-to-digital converter (ADC) that operates up to 4.0 GS/s. This ADC samples wide bandwidth analog signals...

50 3.0

Pseudorandom Number Generator (PRNG) - Balanced variant The PRNG IP core establishes a benchmark for hardware-based security in cryptographic systems by generating high-quality pseudorandom numbers. It deli...