501 0.0

UCIe-S PHY for Standard Package (x16) for Automotive in TSMC (N5A) Synopsys UCIe PHY IP enables high-bandwidth, low-power and low-latency die-to-die connectivity in a package for hyperscale data centers, AI, and netw...

502 0.0

UCIe-S PHY for Standard Package (x32) in TSMC (N3P) Synopsys UCIe PHY IP enables high-bandwidth, low-power and low-latency die-to-die connectivity in a package for hyperscale data centers, AI, and netw...

503 0.0

3DIO PHY IP for TSMC N5 Synopsys 3DIO is a specialized IO for multi-die integration. It includes multiple IP offerings for system-on-chip (SoC) designers to implement tunable...

504 0.0

HDMI 2.0 RX 1P PHY 6Gbps in TSMC (28nm) The Synopsys HDMI Receiver (RX) IP solutions are compliant with the High- Definition Multimedia Interface (HDMI) 2.0 and 1.4 specifications and provid...

505 0.0

HDMI 2.0 Transmitter (TX) IP Solutions The Synopsys HDMI Receiver (RX) IP solutions are compliant with the High- Definition Multimedia Interface (HDMI) 2.0 and 1.4 specifications and provid...

506 0.0

HDMI 2.1 Rx PHY in TSMC (N6C) The Synopsys HDMI 2.1 RX Controller and PHY IP solutions, compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide th...

507 0.0

HDMI 2.1/DisplayPort 2.1 TX PHY in Samsung (SF4A) for Automotive The Synopsys HDMI 2.1 TX Controller and PHY IP solutions, compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide th...

508 0.0

HDMI 2.1/DisplayPort 2.1 TX PHY in Samsung (SF5A) The Synopsys HDMI 2.1 TX Controller and PHY IP solutions,compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide the...

509 0.0

HDMI 2.1/DisplayPort eDP 1.4 TX PHY in TSMC (N6C, N4C) The Synopsys HDMI 2.1 TX Controller and PHY IP solutions,compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide the...

510 0.0

DDR5 MRDIMM2 PHY in Samsung (SF2P) The Synopsys DDR5/4 PHY is a complete physical layer IP interface (PHY) solution for ASIC, ASSP, and system-on-chip (SoC) applications requiring high-...

511 0.0

DDR5 MRDIMM3 PHY in TSMC (N2P) The Synopsys DDR5/4 PHY is a complete physical layer IP interface (PHY) solution for ASIC, ASSP, and system-on-chip (SoC) applications requiring high-...

512 0.0

DDR5 PHY for SS SF4X The Synopsys DDR5/4 PHY is a complete physical layer IP interface (PHY) solution for ASIC, ASSP, and system-on-chip (SoC) applications requiring high-...

513 0.0

DDR5 PHY IP for TSMC N3P The Synopsys DDR5/4 PHY is a complete physical layer IP interface (PHY) solution for ASIC, ASSP, and system-on-chip (SoC) applications requiring high-...

514 0.0

Zebu - Fastest Power Emulator for Hardware-Software Power Verification ZeBu® Empower delivers breakthrough performance for fast hardware-software power verification. Its performance enables multiple iterations per day...

515 0.0

Secure Storage Solution for OTP IP Synopsys Secure Storage Solution for OTP is an add-on solution to Synopsys One-Time-Programable (OTP) Non-Volatile Memory (NVM) IP, designed to addres...

516 0.0

Verification IP for DDR3 (UDIMM, RDIMM, LDIMM) ...

517 0.0

Verification IP for DDR3 (UDIMM, RDIMM, LDIMM) Synopsys® VC VerificationIP for the JEDEC DDR3 memory protocol specification provides a comprehensive set of protocol, methodology, verification and p...

518 0.0

Certified ASIL B & ISO 21434 Cybersecurity Compliant PCIe 5.0 Integrity and Data Encryption Security Module PCI Express is a ubiquitous interface for a wide variety of applications, from connecting accelerators and peripheral devices to data center servers t...

519 0.0

Agile ECC/RSA Public Key Accelerator with 128-bit ALU The impending development of sufficiently powerful quantum computers will break all ECC and RSA public key cryptographic schemes that are deployed in ...

520 0.0

Agile ECC/RSA Public Key Accelerator with 32-bit ALU The impending development of sufficiently powerful quantum computers will break all ECC and RSA public key cryptographic schemes that are deployed in ...

521 0.0

Agile Post Quantum Crypto (PQC) Public Key Accelerator - NIST algorithms The impending development of sufficiently powerful quantum computers will break all ECC and RSA public key cryptographic schemes that are deployed in ...

522 0.0

Agile Public Key Accelerator Firmware - RSA, ECC, PQC (ML-KEM, ML-DSA, XMSS, LMS, SLH-DSA) The impending development of sufficiently powerful quantum computers will break all ECC and RSA public key cryptographic schemes that are deployed in ...

523 0.0

Agile Public Key Accelerator Host Driver - RSA, ECC, PQC (ML-KEM, ML-DSA, XMSS, LMS, SLH-DSA) The impending development of sufficiently powerful quantum computers will break all ECC and RSA public key cryptographic schemes that are deployed in ...

524 0.0

PHY IP for PCIe 6.0 on TSMC N5 The multi-channel Synopsys PHY IP for PCI Express (PCIe) 6.0 meets today’s demands for higher bandwidth and power efficiency across network interface ...

525 0.0

AI data compression option on VPX cores The Synopsys ARC® VPX DSP IP family is optimized for the unique power, performance and area (PPA) requirements of embedded workloads such as IoT senso...

526 0.0

High Speed Access & Test IP PCIE Version High speed access for test and in-chip sensor & monitor data throughout the silicon lifecycle. Within the SiliconMAX Platform, High-Speed Access & Tes...

527 0.0

High Speed Access & Test IP USB Version High speed access for test and in-chip sensor & monitor data throughout the silicon lifecycle. Within the SiliconMAX Platform, High-Speed Access & Tes...

528 0.0

High-performance ARC HS3x and HS4x processors are optimized for GHz+ operating speeds with minimum area and power consumption The DesignWare® ARC® HS family of 32-bit processors is based on the scalable ARCv2 Instruction Set Architecture (ISA) and is optimized to deli...

529 0.0

MIPI C-PHY v1.0 D-PHY v1.2 RX 2 trios/2 Lanes in TSMC (N4C) Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

530 0.0

MIPI C-PHY v1.2 D-PHY v2.1 RX 2 trios/2 Lanes in GlobalFoundries (12nm) Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

531 0.0

MIPI C-PHY v1.2 D-PHY v2.1 RX 3 trios/4 Lanes in GlobalFoundries (12nm) for Automotive Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

532 0.0

MIPI C-PHY v1.2 D-PHY v2.1 RX 3 trios/4 Lanes in Samsung (SF2P) Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

533 0.0

MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes for TSMC 12FFCP Synopsys’ integrated DesignWare C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and...

534 0.0

MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in GlobalFoundries (12nm) for Automotive Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

535 0.0

MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in Samsung (SF2P) Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

536 0.0

MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in Samsung (SF5A, SF4A) for Automotive Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

537 0.0

MIPI C-PHY v2.0 D-PHY v2.1 for TSMC N5A Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

538 0.0

MIPI C-PHY v2.0 D-PHY v2.1 RX 2 trios/2 Lanes in Samsung ST0 SF2A Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

539 0.0

MIPI C-PHY v2.0 D-PHY v2.1 RX 3 trios/4 Lanes in Samsung (SF2A, SF4A) for Automotive Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

540 0.0

MIPI C-PHY v2.0 D-PHY v2.1 RX 3 trios/4 Lanes in TSMC (N7, N5A, N3A) Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

541 0.0

MIPI C-PHY v2.0 D-PHY v2.1 RX for GF 12LP+ Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

542 0.0

MIPI C-PHY v2.0 D-PHY v2.1 RX for TSMC N6 Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

543 0.0

MIPI C-PHY v2.0 D-PHY v2.1 TX 2 trios/2 Lanes in TSMC (N7) for Automotive Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

544 0.0

MIPI C-PHY v2.0 D-PHY v2.1 TX 3 trios/4 Lanes in Samsung (SF5A, SF4A) for Automotive Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

545 0.0

MIPI C-PHY v2.0 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (N7) Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

546 0.0

MIPI C-PHY v2.0 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (N7, N6, N6C) Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

547 0.0

MIPI CSE 2.0 Security Module MIPI CSI‑2 is a widely adopted high‑speed interface for transmitting still and video data from image sensors to processors across mobile, automotive, ...

548 0.0

MIPI D-PHY Rx 4 Lanes on Samsung 8LPU for Automotive Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

549 0.0

MIPI D-PHY Rx-Only 2 Lanes in Samsung (8nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

550 0.0

MIPI D-PHY Rx-Only 4 Lanes in Samsung (8nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...