551 0.0

MIPI D-PHY Tx 4 Lanes on TSMC 7FF18 for Automotive Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

552 0.0

MIPI D-PHY Tx-Only 2 Lanes in Samsung (8nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

553 0.0

MIPI D-PHY v1.2 RX 2 Lanes in Samsung (8nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

554 0.0

MIPI D-PHY v1.2 TX 4 Lanes in Samsung (8nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

555 0.0

MIPI DPHY in GF 22FDSOI18 for Automotive Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

556 0.0

MIPI M-PHY G5 Type 1 2Tx2Rx in Samsung (SF2A, SF4A) for Automotive The silicon-proven Synopsys MIPI® M-PHY IP, compliant with the latest MIPI M-PHY v4.1 specification, supports multiple gears and a broad range of high...

557 0.0

MIPI M-PHY G5 Type 1 2Tx2Rx in TSMC (N5A) for Automotive The silicon-proven Synopsys MIPI® M-PHY IP, compliant with the latest MIPI M-PHY v4.1 specification, supports multiple gears and a broad range of high...

558 0.0

MIPI M-PHY Gear 5 for TSMC N3E The silicon-proven Synopsys MIPI® M-PHY IP, compliant with the latest MIPI M-PHY v4.1 specification, supports multiple gears and a broad range of high...

559 0.0

MIPI M-PHY Type 1 G5 2TX2RX in Samsung (14nm) for Automotive The silicon-proven Synopsys MIPI® M-PHY IP, compliant with the latest MIPI M-PHY v4.1 specification, supports multiple gears and a broad range of high...

560 0.0

MIPI M-PHY Type 1 G5 2TX2RX in TSMC (N3A) for Automotive The silicon-proven Synopsys MIPI® M-PHY IP, compliant with the latest MIPI M-PHY v4.1 specification, supports multiple gears and a broad range of high...

561 0.0

MIPI M-PHY Type 1 G5 2TX2RX in TSMC (N6, N5, N4P, N4C, N3E) The silicon-proven Synopsys MIPI® M-PHY IP, compliant with the latest MIPI M-PHY v4.1 specification, supports multiple gears and a broad range of high...

562 0.0

MIPI M-PHY Type 1 G5 2TX2RX, SR in TSMC (N3P) The silicon-proven Synopsys MIPI® M-PHY IP, compliant with the latest MIPI M-PHY v4.1 specification, supports multiple gears and a broad range of high...

563 0.0

MIPI MPHY G6 2TX2RX in Samsung (SF5A, SF2P) The silicon-proven Synopsys MIPI® M-PHY IP, compliant with the latest MIPI M-PHY v4.1 specification, supports multiple gears and a broad range of high...

564 0.0

MIPI MPHY G6 2TX2RX in TSMC (N6, N3P, N2P) The silicon-proven Synopsys MIPI® M-PHY IP, compliant with the latest MIPI M-PHY v4.1 specification, supports multiple gears and a broad range of high...

565 0.0

Clock Delay Monitor IP Synopsys’ Clock and Delay Monitor (CDM) is a small IP capable of performing on-chip measurements, monitoring, and safety operations. It can be embedde...

566 0.0

Enhanced Neural Processing Unit for functional safety providing 49,152 MACs/cycle of performance for AI applications The ASIL B or D Ready DesignWare ARC NPX6FS NPUs enable automotive system-on-chip (SoC) designers to accelerate ISO 26262 certification of Advanced Dr...

567 0.0

Enhanced Neural Processing Unit for safety providing 32,768 MACs/cycle of performance for AI applications The ASIL B or D Ready DesignWare ARC NPX6FS NPUs enable automotive system-on-chip (SoC) designers to accelerate ISO 26262 certification of Advanced Dr...

568 0.0

Inline Memory Encryption (IME) Security Module for DDR6/LPDDR6/MRDIMM2/MRDIMM3 As our connected world expands, the technological advances in high-performance computing (HPC) are reshaping system-on-chip (SoC) designs to address t...

569 0.0

Integrity and Data Encryption (IDE) Security Module IP for CXL 3.0 The Compute Express Link (CXL) interface protocol enables low-latency data communication between system-on-chip (SoC) and general-purpose accelerators...

570 0.0

Compact, ultra-low power ARC EM processors and ASIL-Ready ARC EM Safety Island IP feature excellent code density The DesignWare® ARC® EM Family of embedded processors is based on the scalable ARCv2 Instruction Set Architecture (ISA) and is optimized for energy an...

571 0.0

Complete Verification IP Portfolio Synopsys VC Verification IP (VIP) is architected to address the challenge of verifying today's highly sophisticated and complex SoC designs. The broad...

572 0.0

Source Code Test Suites AXI Interconnect Writing tests to verify protocols is time consuming, challenging and requires deep protocol and methodology expertise. Synopsys testbenches help elimi...

573 0.0

Source Code Test Suites Ethernet Writing tests to verify protocols is time consuming, challenging and requires deep protocol and methodology expertise. Synopsys testbenches help elimi...

574 0.0

Source Code Test Suites MIPI CSI-2 Synopsys VC Verification IP (VIP) for MIPI Camera Serial Interface 2 (CSI-2) provides a comprehensive set of protocol, methodology, verification and p...

575 0.0

Source Code Test Suites PCIe Writing tests to verify protocols is time consuming, challenging and requires deep protocol and methodology expertise. Synopsys testbenches help elimi...

576 0.0

Source Code Test Suites USB4, 3.2, 3.1, 3.0, 2.0 Synopsys® VC Verification IP for USB provides a comprehensive set of protocol, methodology, verification and productivity features, enabling users to ...

577 0.0

LPDDR Controller ASIL B Compliant for LPDDR5/4/4X for Automotive Applications Synopsys LPDDR5/4/4X Controller is a next-generation controller optimized for power, latency, bandwidth, and area, supporting JEDEC standard LPDDR5, L...

578 0.0

LPDDR Controller ASIL B Compliant for LPDDR5X/5/4X for automotive Synopsys LPDDR5X/5/4X Controller is a next generation controller optimized for power, latency, bandwidth, and area, supporting JEDEC standard LPDDR5X,...

579 0.0

LPDDR Controller for LPDDR5X, LPDDR5 and LPDDR4X Synopsys LPDDR5X/5/4X Controller is a next generation controller optimized for power, latency, bandwidth, and area, supporting JEDEC standard LPDDR5X,...

580 0.0

LPDDR4 multiPHY V2 in UMC (28nm) The Synopsys LPDDR4 multiPHY is Synopsys’ second generation physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and sy...

581 0.0

LPDDR5/4/4X Controller with Inline Memory Encryption (IME) Security Module SynopsysLPDDR5/4/4X Controller is a next generation controller optimized for power, latency, bandwidth, and area, supporting JEDEC standard LPDDR5, LP...

582 0.0

LPDDR5X/5/4X Controller with Inline Memory Encryption (IME) Security Module Synopsys LPDDR5X/5/4X Controller is a next generation controller optimized for power, latency, bandwidth, and area, supporting JEDEC standard LPDDR5X,...

583 0.0

LPDDR5X/5/4X PHY in Samsung (SF4A, SF2A) For Automotive The Synopsys LPDDR5X/5/4X PHY is Synopsys’ physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and system- in- package...

584 0.0

LPDDR5X/5/4X PHY IP in Samsung (SF5A) for Automotive The Synopsys LPDDR5X/5/4X PHY is Synopsys’ physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and system-inpackage ap...

585 0.0

LPDDR5X/5/4X PHY IP on TSMC N3P The Synopsys LPDDR5X/5/4X PHY is Synopsys’ physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and system- in- package...

586 0.0

LPDDR5X/5/4X PHY on TSMC N5A for Automotive The Synopsys LPDDR5X/5/4X PHY is Synopsys’ physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and system-inpackage ap...

587 0.0

LPDDR6/5X/5 Controller IP Synopsys LPDDR6/5X/5 Controller IP is a next generation controller optimized for power, latency, bandwidth, and area, supporting JEDEC standard LPDDR6...

588 0.0

LPDDR6/5X/5 PHY in TSMC (N3P, N2P) The Synopsys LPDDR6/5X/5 PHY IP enables ASICs, ASSPs, system-on-chips (SoCs), and system-in-package applications requiring high-performance LPDDR6, LP...

589 0.0

LPDDR6/5X/5 PHY V2 in Samsung (SF2A, SF4A) for Automotive The Synopsys LPDDR6/5X/5 PHY IP enables ASICs, ASSPs, system-on-chips (SoCs), and system-in-package applications requiring high-performance LPDDR6, LP...

590 0.0

LPDDR6/5X/5 PHY V2 in Samsung (SF2P, SF4X) The Synopsys LPDDR6/5X/5 PHY IP enables ASICs, ASSPs, system-on-chips (SoCs), and system-in-package applications requiring high-performance LPDDR6, LP...

591 0.0

LPDDR6/5X/5 PHY V2 in TSMC (N5A, N3A) for Automotive The Synopsys LPDDR6/5X/5 PHY IP enables ASICs, ASSPs, system-on-chips (SoCs), and system-in-package applications requiring high-performance LPDDR6, LP...

592 0.0

LPDDR6/5X/5 PHY V2 in TSMC (N6, N6C, N5, N4P, N4C, N3P, N2P) The Synopsys LPDDR6/5X/5 PHY IP enables ASICs, ASSPs, system-on-chips (SoCs), and system-in-package applications requiring high-performance LPDDR6, LP...

593 0.0

ARC NPX6 NPU IP Processor: AI Data Compression Option (OCP-MX) The Synopsys ARC® NPX6 NPU IP Processor’s AI data compression option offers advanced data conversion and compression capabilities to enhance the eff...

594 0.0

ARC Processors for Audio The DSP-enhanced Synopsys ARC® EMxD and HS4xD Families of embedded 32-bit processors are based on the scalable ARCv2DSP Instruction Set Architecture (...

595 0.0

tRoot F004 G Hardware Secure Module (w/ ARC EM4, SEMC, PKA, SPAcc) Synopsys tRoot™ Hardware Secure Modules (HSMs) with Root of Trust enable connected devices to securely and uniquely identify and authenticate themselv...

596 0.0

tRoot F110 G Hardware Secure Module Synopsys tRoot™ Hardware Secure Modules (HSMs) with Root of Trust enable connected devices to securely and uniquely identify and authenticate themselv...

597 0.0

tRoot V023 FS Hardware Secure Module, ASIL-B compliant (w/ ARC EM22FS) The ASIL B compliant DesignWare® tRoot™ Hardware Secure Module (HSM) for Automotive augments its comprehensive root of trust security solution with a ...

598 0.0

Protocol and Memory aware Debug With today's complex protocols and memory, debug has become one of the most difficult and time-consuming aspects of functional verification. Verdi Pro...

599 0.0

USB 3.0 Device Controller IP The Synopsys SuperSpeed USB IP solution is implemented in hundreds of designs and shipped in millions of units. The USB IP solution is based on the US...

600 0.0

USB 4.0 V2 PHY - 4TX/2RX in TSMC (N3P) The Synopsys USB4 IP solution is based on the USB4 specification from the USB Implementer Forum (USB-IF). The USB4 IP offering includes device router,...