701 0.0

Synopsys Verification IP for LPDDR2 Synopsys® VC Verification IP for the JEDEC LPDDR2 memory protocol specification provides a comprehensive set of protocol, methodology, verification an...

702 0.0

Synopsys Verification IP for LPDDR2 ...

703 0.0

Synopsys Verification IP for LPDDR3 Synopsys® VC VerificationIP for the JEDEC LPDDR3 memory protocol specification provides a comprehensive set of protocol, methodology, verification and...

704 0.0

Synopsys Verification IP for LPDDR4 Synopsys® VC Verification IP for the JEDEC LPDDR4 memory protocol specification provides a comprehensive set of protocol, methodology, verification an...

705 0.0

Synopsys Verification IP for UniPro Synopsys® VC Verification IP for the MIPI Alliance UniPro protocol specification provides a comprehensive set of protocol, methodology, verification a...

706 0.0

Synthesizable 3DIO IP for Flexible Physical Implementation Synopsys 3DIO is a specialized IO for multi-die integration. It includes multiple IP offerings for system-on-chip (SoC) designers to implement tunable...

707 200.0

MACsec Engine, 1G to 100G Single-Port The MACsec-IP-160 is a versatile MACsec solution for silicon devices that require plug-and-play MACsec processing for an Ethernet port at full line ra...

708 200.0

MACsec Engine, 1G to 25G, Full Duplex, Integrated As part of Rambus' award-winning silicon Intellectual Property (IP) product portfolio, the EIP-165 is a high-performance, split ingress/egress in-line...

709 200.0

MACsec Engine, 1G to 50G Single-Port, with TSN support The MACsec-IP-161 is a versatile MACsec solution for silicon devices that require plug-and-play MACsec processing for an Ethernet port at full line ra...

710 200.0

MACsec Engine,10M-25G Single-Port, ISO 26262 Compliant with xMII Interface The MACsec-IP-362 consists of the Rambus MACsec-IP-162 (a single-port line-rate MACsec engine with FIFO interface and optional preemption) and xMII in...

711 200.0

MACsec Engine,10M-50G Single-Port with xMII Interface and TSN Support The MACsec-IP-361 is a plug-and-play solution for adding MACsec on the xMII side of an Ethernet subsystem. It is ISO 26262 ASIL-B Ready certified and ...

712 200.0

HBM4 Memory Controller The Rambus HBM4 Controller Core is designed for use in applications requiring high memory bandwidth and low latency including AI/ML, HPC, advanced dat...

713 200.0

CC-6xx CryptoManager Core The Rambus CryptoManager Core CC-6xx is a standalone symmetric cipher-only subsystem of the CryptoManager Hub CH-6xx. The CC-6xx products are designed...

714 200.0

CC-7xx CryptoManager Core The automotive-grade Rambus CryptoManager Core CC-7xx family is a standalone symmetric cipher-only subsystem of the CryptoManager Hub CH-7xx. The CC-7...

715 200.0

ICE-IP-338 High-speed XTS-GCM Multi Stream Inline Cipher Engine The Protocol-IP-338 (EIP-338) is a scalable, high-performance, multi-stream cryptographic engine that offers XTS and GCM modes of operation for the AE...

716 200.0

ICE-IP-358 High-speed XTS-GCM Multi Stream Inline Cipher Engine, DPA resistant The Protocol-IP-338 (EIP-338) is a scalable, high-performance, multi-stream cryptographic engine that offers XTS and GCM modes of operation for the AE...

717 200.0

PCIe 7.0 Controller The Rambus PCI Express® (PCIe®) 7.0 Controller is a configurable and scalable design for ASIC implementations. It is backward compatible to the PCIe 6...

718 200.0

GDDR7 Memory Controller The Rambus GDDR7 controller core is designed for use in applications requiring high memory throughput including graphics, high performance computing (...

719 200.0

CH-6xx CryptoManager Hub The Rambus CryptoManager Hub CH-6xx is the next generation of flexible and configurable cryptographic family of accelerator cores. CH-6xx designs targ...

720 200.0

CH-7xx CryptoManager Hub The automotive-grade CryptoManager Hub (CMH) from Rambus is the next-generation of flexible and configurable cryptographic family of accelerator cores...

721 200.0

MIPI C-PHY/D-PHY Combo CSI-2 RX+ IP (6.0Gsps/trio, 4.5Gbps/lane) in TSMC N6 The MXL-CDPHY-6p0G-CSI-2-RX+-T-N6 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificat...

722 200.0

MIPI C-PHY/D-PHY Combo RX+ IP (4.5Gsps/4.5Gbps) in TSMC N5 The MXL-CD-PHY-CSI-RX+-T-N05 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification ...

723 200.0

MIPI C-PHY/D-PHY Combo Universal IP (8.0Gsps/trio, 6.5Gbps/lane) in TSMC 16FFC The MXL-CDPHY-UNIV-8p0G-T-16FFC is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificatio...

724 200.0

Compute Express Link (CXL) 3.1 Controller The Rambus Compute Express Link® (CXL®) 3.1 controller is a parameterizable design for ASIC and FPGA implementations. It leverages the Rambus PCIe® 6....

725 200.0

LPDDR Combo Controller - LPDDR4X/4 & LPDDR5T/5X/5 The Rambus LPDDR4 and LPDDR5 combo controller core is designed for use in applications requiring high memory throughput at low power including mobile,...

726 200.0

LPDDR5T / LPDDR5X / LPDDR5 Controller The Rambus LPDDR5 Controller supporting LPDDR5T, LPDDR5X, LPDDR5 controller core is designed for use in applications requiring high memory throughput ...

727 200.0

True Random Number Generator The EIP-76 TRNG is an advanced hardware based, technology independent True Random Number Generator. Security is now a basic requirement for all device...

728 200.0

RT-6xx CryptoManager Root of Trust The Rambus CryptoManager RT-6xx v3 Root of Trust (CMRT) family from is the latest generation of fully programmable FIPS 140-3 compliant hardware secur...

729 200.0

RT-7xx CryptoManager Root of Trust The Rambus automotive-grade CryptoManager RT-7xx v3 Root of Trust family is the next generation of fully programmable ISO 26262 and ISO 21434 complian...

730 195.0

PCIe 7.0 Retimer Controller The Rambus PCI Express® (PCIe®) 7.0 Retimer Controller provides a complete digital data path solution that delivers best-in-class latency, power and a...

731 195.0

PCIe 7.0 Switch The Rambus PCI Express® (PCIe®) 7.0 Switch is a customizable, multiport embedded switch for PCIe designed for ASIC and FPGA implementations. It enable...

732 190.0

PCIe 6.1 Controller The Rambus PCI Express® (PCIe®) 6.1 Controller is a configurable and scalable design for ASIC implementations. It is backward compatible to the PCIe 5...

733 190.0

PCIe 6.2 Switch The Rambus PCI Express® (PCIe®) 6.2 Switch is a customizable, multiport embedded switch for PCIe designed for ASIC implementations. It enables the con...

734 190.0

MIPI CSI-2 Controller Core V2 The Rambus CSI-2 Controller Core V2 is the second generation CSI-2 controller core. It is further optimized for high performance, low power and small ...

735 190.0

MIPI DSI-2 Controller Core The Rambus DSI-2 Controller Core is the second generation DSI controller core. It is further optimized for high performance, low power and small size....

736 180.0

HBM3E / HBM3 Memory Controller The Rambus HBM3E/3 Controller Cores are designed for use in applications requiring high memory throughput, low latency and full programmability. T...

737 180.0

PCIe 5.0 Controller supporting Endpoint, Root Port, Switch, Bridge and advanced features Rambus PCIe 5.0 Controller is a configurable and scalable PCIe controller Soft IP designed for ASIC and FPGA implementation. Rambus PCIe 5.0 Controlle...

738 180.0

GDDR6 Memory Controller Rambus GDDR6 Controller Core is designed for use in applications requiring high memory throughput, high clock rates and full programmability. The ...

739 180.0

Quantum Safe Engine (QSE) Quantum Safe Cryptography acceleration to protect data and devices in the quantum computing era...

740 180.0

Multi-Protocol Crypto Engine with Classification The EIP-197 is a family of high speed Cryptographic Accelerators with embedded Classification Engine, Virtualization, Latency compensation to maintain...

741 180.0

Multi-Protocol Engine with Classifier, Look-Aside, 5-10 Gbps The Protocol-IP-196 Multi-Protocol Engine is a protocol-aware packet engine for accelerating IPSec, SSL/TLS, DTLS, 3GPP and MACsec up to 10 Gbps in mu...

742 170.0

PCIe 5.0 Customizable Embedded Multi-port Switch Rambus PCIe 5.0 Multi-port Switch is a customizable, Embedded PCIe Switch designed for ASIC and FPGA implementations enabling the connection of one u...

743 160.0

PCIe 4.0 Controller supporting Endpoint, Root Port, Switch, Bridge and advanced features Rambus PCIe 4.0 Controller is a configurable and scalable PCIe controller Soft IP designed for ASIC and FPGA implementation. The Rambus PCIe 4.0 Contr...

744 150.0

100MHz-13.5GHz, Gen Phase-Locked Loop (PLL) IP block Alphacore offers proven 100MHz to 13.5GHz Phase-Locked Loop (PLL) intellectually property (IP) design blocks with the industry's best core offerings w...

745 150.0

Compute Express Link (CXL) 2.0 Controller Rambus Compute Express Link (CXL) 2.0 Controller leverages a silicon-proven PCIe 5.0 controller architecture for the CXL.io path, and adds CXL.cache a...

746 120.0

6-12-bit, Gen Analog-to-Digital Converter (ADC) IP block Alphacore offers proven 6-12-bit analog to digital converters (ADC) intellectually property (IP) design blocks with the industry's best low-power and ...

747 120.0

4-16-bit, Gen Digital-to-Analog Converter (DAC) IP block Alphacore offers proven 4-16-bit digital-to-analog converters (DAC) intellectually property (IP) design blocks with the industry's best low-power and ...

748 102.0

MIPI C-PHY/D-PHY Combo CSI-2 TX+ IP 4.5Gsps/4.5Gbps The MXL-CDPHY-4p5G-CSI-2-TX+-16FFC is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specifica...

749 102.0

MIPI C-PHY/D-PHY Combo RX IP 4.5Gsps/4.5Gbps in TSMC N7 The MXL-CDPHY-4p5G-CSI-2-RX-T-N7FF is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specific...

750 102.0

MIPI C-PHY/D-PHY Combo TX+ IP 4.5Gsps/4.5Gbps in TSMC N5 The MXL-CDPHY-DSI-TX+-T-N05 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification fo...