2251 1.0

TSMC CLN55LP 55nm Deskew PLL - 60MHz-300MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2252 1.0

TSMC CLN55LP 55nm General Purpose PLL - 120MHz-600MHz The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...

2253 1.0

TSMC CLN55LP 55nm Multi Phase DLL - 120MHz-600MHz The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

2254 1.0

TSMC CLN55LP 55nm Multi Phase DLL - 240MHz-1200MHz The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

2255 1.0

TSMC CLN55LP 55nm Multi Phase DLL - 60MHz-300MHz The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

2256 1.0

TSMC CLN55LP 55nm Spread Spectrum PLL - 120MHz-600MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2257 1.0

TSMC CLN55LP 55nm Spread Spectrum PLL - 240MHz-1200MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2258 1.0

TSMC CLN55LP 55nm Spread Spectrum PLL - 60MHz-300MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2259 1.0

TSMC CLN65GP 65nm Clock Generator PLL - 130MHz-650MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2260 1.0

TSMC CLN65GP 65nm Clock Generator PLL - 260MHz-1300MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2261 1.0

TSMC CLN65GP 65nm Clock Generator PLL - 520MHz-2600MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2262 1.0

TSMC CLN65GP 65nm DDR DLL - 150MHz-750MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2263 1.0

TSMC CLN65GP 65nm DDR DLL - 200MHz-1000MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2264 1.0

TSMC CLN65GP 65nm DDR DLL - 316MHz-1580MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2265 1.0

TSMC CLN65GP 65nm Deskew PLL - 130MHz-650MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2266 1.0

TSMC CLN65GP 65nm Deskew PLL - 260MHz-1300MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2267 1.0

TSMC CLN65GP 65nm Deskew PLL - 520MHz-2600MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2268 1.0

TSMC CLN65GP 65nm General Purpose PLL - 260MHz-1300MHz The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...

2269 1.0

TSMC CLN65GP 65nm Multi Phase DLL - 130MHz-650MHz The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

2270 1.0

TSMC CLN65GP 65nm Multi Phase DLL - 260MHz-1300MHz The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

2271 1.0

TSMC CLN65GP 65nm Multi Phase DLL - 520MHz-2600MHz The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

2272 1.0

TSMC CLN65GP 65nm Spread Spectrum PLL - 130MHz-650MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2273 1.0

TSMC CLN65GP 65nm Spread Spectrum PLL - 260MHz-1300MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2274 1.0

TSMC CLN65GP 65nm Spread Spectrum PLL - 520MHz-2600MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2275 1.0

TSMC CLN65LP 65nm Clock Generator PLL - 120MHz-600MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2276 1.0

TSMC CLN65LP 65nm Clock Generator PLL - 240MHz-1200MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2277 1.0

TSMC CLN65LP 65nm Clock Generator PLL - 60MHz-300MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2278 1.0

TSMC CLN65LP 65nm DDR DLL - 104MHz-520MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2279 1.0

TSMC CLN65LP 65nm DDR DLL - 164MHz-820MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2280 1.0

TSMC CLN65LP 65nm DDR DLL - 78MHz-390MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2281 1.0

TSMC CLN65LP 65nm Deskew PLL - 120MHz-600MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2282 1.0

TSMC CLN65LP 65nm Deskew PLL - 240MHz-1200MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2283 1.0

TSMC CLN65LP 65nm Deskew PLL - 60MHz-300MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2284 1.0

TSMC CLN65LP 65nm General Purpose PLL - 120MHz-600MHz The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...

2285 1.0

TSMC CLN65LP 65nm Multi Phase DLL - 120MHz-600MHz The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

2286 1.0

TSMC CLN65LP 65nm Multi Phase DLL - 240MHz-1200MHz The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

2287 1.0

TSMC CLN65LP 65nm Multi Phase DLL - 60MHz-300MHz The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

2288 1.0

TSMC CLN65LP 65nm Spread Spectrum PLL - 120MHz-600MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2289 1.0

TSMC CLN65LP 65nm Spread Spectrum PLL - 240MHz-1200MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2290 1.0

TSMC CLN65LP 65nm Spread Spectrum PLL - 60MHz-300MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2291 1.0

TSMC CLN80GC 80nm Clock Generator PLL - 160MHz-800MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2292 1.0

TSMC CLN80GC 80nm Clock Generator PLL - 320MHz-1600MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2293 1.0

TSMC CLN80GC 80nm Clock Generator PLL - 80MHz-400MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2294 1.0

TSMC CLN80GC 80nm DDR DLL - 124MHz-620MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2295 1.0

TSMC CLN80GC 80nm DDR DLL - 196MHz-980MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2296 1.0

TSMC CLN80GC 80nm DDR DLL - 93MHz-465MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2297 1.0

TSMC CLN80GC 80nm Deskew PLL - 160MHz-800MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2298 1.0

TSMC CLN80GC 80nm Deskew PLL - 320MHz-1600MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2299 1.0

TSMC CLN80GC 80nm Deskew PLL - 80MHz-400MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2300 1.0

TSMC CLN80GC 80nm Multi Phase DLL - 160MHz-800MHz The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....