Design & Reuse
Catalog of SIP Cores
System on Chip design resources
5397 IP
4001
0.0
UMC L110SP 110nm DDR DLL - 57MHz-285MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4002
0.0
UMC L110SP 110nm DDR DLL - 76MHz-380MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4003
0.0
UMC L110SP 110nm Deskew PLL - 118MHz-590MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4004
0.0
UMC L110SP 110nm Deskew PLL - 236MHz-1180MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4005
0.0
UMC L110SP 110nm Deskew PLL - 59MHz-295MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4006
0.0
UMC L110SP 110nm Spread Spectrum PLL - 118MHz-590MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
4007
0.0
UMC L110SP 110nm Spread Spectrum PLL - 236MHz-1180MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
4008
0.0
UMC L110SP 110nm Spread Spectrum PLL - 59MHz-295MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
4009
0.0
UMC L28EHV 28nm Clock Generator PLL - 150MHz-750MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
4010
0.0
UMC L28EHV 28nm Clock Generator PLL - 300MHz-1500MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
4011
0.0
UMC L28EHV 28nm Clock Generator PLL - 600MHz-3000MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
4012
0.0
UMC L28EHV 28nm DDR DLL - 130MHz-650MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4013
0.0
UMC L28EHV 28nm DDR DLL - 205MHz-1025MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4014
0.0
UMC L28EHV 28nm DDR DLL - 98MHz-490MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4015
0.0
UMC L28EHV 28nm Deskew PLL - 150MHz-750MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4016
0.0
UMC L28EHV 28nm Deskew PLL - 300MHz-1500MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4017
0.0
UMC L28EHV 28nm Deskew PLL - 600MHz-3000MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4018
0.0
UMC L28EHV 28nm General Purpose PLL - 300MHz-1500MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...
4019
0.0
UMC L28EHV 28nm Multi Phase DLL - 150MHz-750MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
4020
0.0
UMC L28EHV 28nm Multi Phase DLL - 300MHz-1500MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
4021
0.0
UMC L28EHV 28nm Multi Phase DLL - 600MHz-3000MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
4022
0.0
UMC L28EHV 28nm Spread Spectrum PLL - 131MHz-656MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
4023
0.0
UMC L28EHV 28nm Spread Spectrum PLL - 262MHz-1310MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
4024
0.0
UMC L28EHV 28nm Spread Spectrum PLL - 524MHz-2620MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
4025
0.0
UMC L28EHV 28nm Ultra PLL - 15MHz-3000MHz
The Ultra PLL is designed with a state-of-the-art architecture using high-speed digital and analog circuits that offers exceptional performance, featu...
4026
0.0
UMC L28EHVLVT 28nm Clock Generator PLL - 225MHz-1125MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
4027
0.0
UMC L28EHVLVT 28nm Clock Generator PLL - 450MHz-2250MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
4028
0.0
UMC L28EHVLVT 28nm Clock Generator PLL - 900MHz-4500MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
4029
0.0
UMC L28EHVLVT 28nm DDR DLL - 160MHz-800MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4030
0.0
UMC L28EHVLVT 28nm DDR DLL - 214MHz-1070MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4031
0.0
UMC L28EHVLVT 28nm DDR DLL - 338MHz-1690MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4032
0.0
UMC L28EHVLVT 28nm Deskew PLL - 225MHz-1125MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4033
0.0
UMC L28EHVLVT 28nm Deskew PLL - 450MHz-2250MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4034
0.0
UMC L28EHVLVT 28nm Deskew PLL - 900MHz-4500MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4035
0.0
UMC L28EHVLVT 28nm General Purpose PLL - 450MHz-2250MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...
4036
0.0
UMC L28EHVLVT 28nm Multi Phase DLL - 225MHz-1125MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
4037
0.0
UMC L28EHVLVT 28nm Multi Phase DLL - 450MHz-2250MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
4038
0.0
UMC L28EHVLVT 28nm Multi Phase DLL - 900MHz-4500MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
4039
0.0
UMC L28EHVLVT 28nm Spread Spectrum PLL - 196MHz-984MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
4040
0.0
UMC L28EHVLVT 28nm Spread Spectrum PLL - 394MHz-1970MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
4041
0.0
UMC L28EHVLVT 28nm Spread Spectrum PLL - 788MHz-3940MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
4042
0.0
UMC L28EHVLVT 28nm Ultra PLL - 15MHz-3000MHz
The Ultra PLL is designed with a state-of-the-art architecture using high-speed digital and analog circuits that offers exceptional performance, featu...
4043
0.0
UMC L28HLP 28nm Clock Generator PLL - 110MHz-550MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
4044
0.0
UMC L28HLP 28nm Clock Generator PLL - 220MHz-1100MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
4045
0.0
UMC L28HLP 28nm Clock Generator PLL - 440MHz-2200MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
4046
0.0
UMC L28HLP 28nm DDR DLL - 117MHz-585MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4047
0.0
UMC L28HLP 28nm DDR DLL - 156MHz-780MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4048
0.0
UMC L28HLP 28nm DDR DLL - 246MHz-1230MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4049
0.0
UMC L28HLP 28nm Deskew PLL - 110MHz-550MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4050
0.0
UMC L28HLP 28nm Deskew PLL - 220MHz-1100MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...