Design & Reuse
1929 IP
51
9.0
Camera High Dynamic Range IP - PINE
The PINE with HDR functionality receives a fused Multi-exp. image from the sensor and processes it internally to extend the Dynamic Range of the image...
52
8.0
Camera 3DNR IP - AMUR (ME based)
AMUR is a 3D Noise Reduction (3DNR) IP that effectively reduces noise in digital images. It is optimized for low light environment. AMUR uses Motion E...
53
8.0
Camera 3DNR IP - VINI (MA based)
VINI is a 3D Noise Reduction (3DNR) IP that effectively reduces noise in digital images. It realizes high performance with low gate size and memory us...
54
8.0
HASH Core, providing MD5, SHA1 and SHA256. Includes DMA and AXI Interface
This is a high performance, small footprint HASH IP Core. It supports three HASH algorithms: MD5, SHA1, SHA256. A S/G DMA engine keeps the core runni...
55
8.0
Serial ATA Bridge Controller (1.5, 3.0, 6.0 Gb/s)
The Serial ATA Bridge IP Core provides an method to manipulate data between two SATA endpoints. High Performance, with maximum bandwidth data transfer...
56
8.0
Serial ATA Gen 3 Host Controller (1.5, 3.0, 6.0 Gb/s)
The Serial ATA Host IP Core provides an interface to high-speed serial link replacements for the parallel ATA attachment of mass storage devices. The ...
57
8.0
Serial ATA Host Controller (1.5, 3.0, 6.0 Gb/s) 5th Generation
The Serial ATA Host IP Core provides an interface to high-speed serial link replacements for the parallel ATA attachment of mass storage devices. The ...
58
8.0
AES supporting ECB, CBC and XTS/XEX modes. Includes DMA and AXI interface.
This is a high performance, small footprint crypt/decrypt IP Core. It features up to 8 independent crypt engines. Three DMA engines make sure the cor...
59
8.0
ZLIB compatible compression and decompession, with DMA and AXi interface
This is a high performance, small footprint ZLIB compatible IP Core. It features 3 DMA engines, AXI interconnect and separate clocks for AXI interface...
60
7.0
Camera LDC (De-warp) IP - GINKGO
GINKGO is an Lens Distortion Correction IP capable of up to 192° angle correction. It comes with factors that can adjust zoom and un-distortion streng...
61
7.0
Camera Scaler IP - DSCALE
DSCALE is an IP that reduces the input image to a specified output size. DSCALE can simultaneously process one input image into four different reduce...
62
7.0
SAS Initiator, 12G, 4 Ports, 48 Gbps, AXI Interface
The SAS Initiator Controller IP Core provides an interface to high-speed serial link replacement for the parallel SCSI attachment of mass storage devi...
63
7.0
SAS Initiator, 12G, Wide, 4 Ports, 48 Gbps
The SAS Initiator Controller IP Core provides an interface to high-speed serial link replacement for the parallel SCSI attachment of mass storage devi...
64
6.0
2-ch 16-bit stereo Audio ADC
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65
6.0
2-ch 16-bit stereo Audio ADC
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66
6.0
2-ch 24-bit 192KSPS Audio DAC
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67
6.0
2-ch 24-bit 192KSPS Audio DAC
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68
6.0
2-ch 24-bit 192KSPS Audio DAC; TSMC 40nm LP
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69
6.0
10-bit dual-port 30MHz ~ 85MHz LVDS Tx;
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70
6.0
10/100 Base-TX Fast Ethernet PHY; SMIC 40nm LL
SP-10_100_Ethernet-S40LL is a single-port DSP-based Fast Ethernet Transceiver. It contains all the active circuitry required to convert data stream to...
71
6.0
10/100 Base-TX Fast Ethernet PHY; TSMC 55nm GP
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72
6.0
10/100 Ethernet PHY for TSMC 22nm ULP
10 100ETHERNET-T22ULP18 is a single-port DSP-based Fast Ethernet Transceiver. It contains all the ac?tive circuitry required to convert data stream to...
73
6.0
10/100 Ethernet PHY, TSMC 28nm HPC+
-10 100ETHERNET-T28HPCP18 is a single-port DSP-based Fast Ethernet Transceiver. It contains all the ac?tive circuitry required to convert data stream ...
74
6.0
24-bit 192KSPS Audio DAC
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75
6.0
24-bit 192KSPS Audio DAC;
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76
6.0
16-bit 48KSPS stereo Audio ADC
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77
6.0
16-bit 48KSPS stereo Audio ADC;
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78
6.0
Camera Demosaicing IP - DAISY (RCCC)
The demosaicing is a color filter interpolation method, and refers to an image processing algorithm for restoring full color values of all pixels in a...
79
6.0
Camera Demosaicing IP - LOTUS (RCCB)
The demosaicing is a color filter interpolation method, and refers to an image processing algorithm for restoring full color values of all pixels in a...
80
6.0
Camera Demosaicing IP - ROSE (RGB-IR)
The demosaicing is a color filter interpolation method, and refers to an image processing algorithm for restoring full color values of all pixels in a...
81
6.0
Single port 10/100 Fast Ethernet Transceiver - TSMC12nm FFC
SP-10 100ETHERNET-T12FFC is a single-port DSP-based Fast Ethernet Transceiver. It contains all the active circuitry required to convert data stream t...
82
6.0
MIPI D-PHY Receiver with PPI
SP_MIPI_DPHY_RX_PPI _T28HPCP is a MIPI D-PHY Receiver, which complies with MIPI D-PHY specification version 1.2. This D-PHY design receives data from ...
83
6.0
MIPI Rx D-PHY
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84
6.0
USB 2.0 PHY; SMIC 40nm LL
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85
6.0
USB 2.0 PHY; SMIC 55nm LL
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86
6.0
USB 3.0 Device
A USB 3.0 Device IP Core that provides high performance SuperSpeed USB connectivity in a small footprint solution for quick and easy implementation of...
87
6.0
LVDS 10 bits dual port transmitter
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88
5.0
H.264/AVC 1080 60p Baseline Profile Decoder
TMC's TM21745 is a decoder IP core that is compliant with ISO/IEC 14496-10 | ITU-T Rec.H.264. Using TMC's original computer algorithm, we have real...
89
5.0
H.264/AVC 1080 60p Baseline Profile Encoder
- TMC's TM21745 is an encoder IP core that is compliant with ISO/IEC 14496-10 | ITU-T Rec.H.264. - Using TMC's original computer algorithm, we have...
90
5.0
H.264/AVC 4K 60p High Profile Decoder
- TMC's H.264 core (RTL- IP) is designed to be compliant with the H.264 4K Video, which is a highly efficient image compression method standardized in...
91
5.0
H.264/AVC 4K 60p High Profile Encoder
- TMC's H.264 core (RTL- IP) is designed to be compliant with the H.264 4K Video, which is a highly efficient image compression method standardized in...
92
5.0
H.265/HEVC 422 10bit Decoder for 4K
DMNA realizes real time Encoding of 4K (3840 x 2160) and 8K (7680 x 4320) / 60fps video stream compliant with H.265 / HEVC...
93
5.0
H.265/HEVC 422 10bit Encoder for 4K
DMNA realizes real time Encoding of 4K (3840 x 2160) and 8K (7680 x 4320) / 60fps video stream compliant with H.265 / HEVC...
94
5.0
H.265/HEVC H.264/AVC 422 12bit Multi-Codec for 8K
TMC’s HEVC/AVC Multi-Codec IP Core for 4K/8K are designed to be compliant with the H.264 4K (4096 x 2160) Video and H.265 8K (8192 x 4320) Vid...
95
5.0
1:2 Fixed Length Visually Lossless Compression/Decompression
Suppressing the degradation of image quality by the original comp./decomp. processing, drastic reductions of Memory amount and Bandwidth could be real...
96
5.0
1:2 Fixed Length Visually Lossless Compression/Decompression
Suppressing the degradation of image quality by the original comp./decomp. processing, drastic reductions of Memory amount and Bandwidth could be real...
97
5.0
1:3 Fixed Length Visually Lossless Compression/Decompression
Suppressing the degradation of image quality by the original comp./decomp. processing, drastic reductions of Memory amount and Bandwidth could be real...
98
5.0
1:3 Fixed Length Visually Lossless Compression/Decompression
Suppressing the degradation of image quality by the original comp./decomp. processing, drastic reductions of Memory amount and Bandwidth could be real...
99
5.0
1:3 Fixed Length Visually Lossless Compression/Decompression
Suppressing the degradation of image quality by the original comp./decomp. processing, drastic reductions of Memory amount and Bandwidth could be real...
100
5.0
1:4 Fixed Length Visually Lossless Compression/Decompression
Suppressing the degradation of image quality by the original comp./decomp. processing, drastic reductions of Memory amount and Bandwidth could be real...