Design & Reuse
Catalog of SIP Cores
System on Chip design resources
3072 IP
1
200.0
MIPI C-PHY/D-PHY Combo CSI-2 RX+ IP (6.0Gsps/trio, 4.5Gbps/lane) in TSMC N6
The MXL-CDPHY-6p0G-CSI-2-RX+-T-N6 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificat...
2
200.0
MIPI C-PHY/D-PHY Combo RX+ IP (4.5Gsps/4.5Gbps) in TSMC N5
The MXL-CD-PHY-CSI-RX+-T-N05 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification ...
3
200.0
MIPI C-PHY/D-PHY Combo Universal IP (8.0Gsps/trio, 6.5Gbps/lane) in TSMC 16FFC
The MXL-CDPHY-UNIV-8p0G-T-16FFC is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificatio...
4
200.0
MIPI C/D-PHY Combo Tx IP, Silicon Proven in TSMC 22 ULP
C-PHY/D-PHY Combo in numerous process nodes at low cost and power. To accommodate a range of applications, users can set this Combo PHY in either D-PH...
5
160.0
Display Port v1.4 Rx PHY & Controller IP, Silicon Proven in TSMC 40LP
This Display Port v1.4 Rx PHY IP Core supports Channel capacity, offering programmable analog characteristics like CDR Bandwidth, Equalizer Strength, ...
6
120.0
Bluetooth - BLE v6.0 RF PHY IP in TSMC 22nm
This BLE 6.0 RF IP, developed in TSMC 22nm, is designed for Bluetooth Low Energy technology, with a strong emphasis on channel sounding capabilities. ...
7
120.0
BT Dual Mode v6.0 RF PHY IP in TSMC 22nm with Channel sounding
The Ultra-Low-Power DM RF transceiver IP in TSMC22 ULL is designed to meet 2.4 GHz standards like Bluetooth Classic (BR/EDR), Bluetooth Low Energy, 80...
8
102.0
MIPI C-PHY/D-PHY Combo RX IP 4.5Gsps/4.5Gbps in TSMC N7
The MXL-CDPHY-4p5G-CSI-2-RX-T-N7FF is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specific...
9
102.0
MIPI C-PHY/D-PHY Combo TX+ IP 4.5Gsps/4.5Gbps in TSMC N5
The MXL-CDPHY-DSI-TX+-T-N05 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification fo...
10
102.0
Automotive MIPI C-PHY/D-PHY Combo RX+ IP (4.5Gsps/4.5Gbps) in TSMC N5
The AUTO-MXL-CD-PHY-CSI-RX+-T-N05 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specifica...
11
102.0
Automotive MIPI C-PHY/D-PHY Combo TX+ IP 4.5Gsps/4.5Gbps in TSMC N5
The AUTO-MXL-CDPHY-DSI-TX+-T-N05 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificati...
12
101.0
TSMC Low Dropout Regulator_(With Capacity & Without Capacity)
The ARKCHIPS_LDO is a voltage regulator IP with enable active function, which supplies a steady voltage, wide power supply with load current range T...
13
100.0
112G Ethernet PHY in TSMC (N7, N6, N5, N3P)
The Synopsys 112G Ethernet PHY IP, an integral part of Synopsys’ high-speed SerDes IP portfolio, meets the growing high bandwidth and low latency need...
14
100.0
224G Ethernet PHY in TSMC (N3E, N2P)
The Synopsys 224G Ethernet PHY IP, an integral part of Synopsys’ high-speed SerDes IP portfolio, meets the growing high bandwidth and low latency need...
15
100.0
PCIe 6.0 PHY in TSMC (N6, N5, N4P, N4C, N3P, N3E)
The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 6.0 meets today’s demands for higher bandwidth and power efficiency across network interfac...
16
100.0
PCIe 7.0 PHY in TSMC (N5, N4P, N4C, N3P, N3C, N2P)
The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 7.0 meets today’s demands for higher bandwidth and power efficiency across backplane, and c...
17
100.0
UCIe-A PHY for Advanced Package (x64) in TSMC (N7, N6, N5, N3)
Synopsys UCIe PHY IP enables high-bandwidth, low-power and low-latency die-to-die connectivity in a package for hyperscale data centers, AI, and netw...
18
100.0
UCIe-S PHY for Standard Package (x16) in TSMC (N7, N6, N4P, N5, N3)
Synopsys UCIe PHY IP enables high-bandwidth, low-power and low-latency die-to-die connectivity in a package for hyperscale data centers, AI, and netw...
19
100.0
MIPI CSI DSI C-PHY IP for TSMC (5nm, 6/7nm, 12/16nm, 22nm, 28nm, 40nm)
Arasan's MIPI C-PHY is designed and compliant with latest MIPI C-Phy Standards. The MIPI C-PHY V1.2 improves throughput over a bandwidth-limited ch...
20
100.0
MIPI D-PHY / C-PHY Combo IP for TSMC (5nm, 6/7nm, 12/16nm, 22nm, 28nm, 40nm)
Combination MIPI CPHY-DPHY Analog Interface The MIPI C-PHY V1.2 improves throughput over a bandwidth limited channel, allowing more data without in...
21
100.0
MIPI D-PHY IP for TSMC (5nm, 6/7nm, 12/16nm, 22nm, 28nm, 40nm)
Arasan delivers you MIPI D-PHY in the process node and lane configuration you need, conforming to your specific design constraints, with a complete G...
22
100.0
USB 2.0 PHY TSMC 5nm, 6/7nm, 12/16nm, 22nm, 28nm, 40nm, 65nm, 130nm, 180nm
The Arasan USB 2.0 PHY IP core is a transceiver compliant with the USB 2.0 Transceiver Macrocell Interface Plus (UTMI+) level 3 specification, for use...
23
100.0
USB4 PHY in TSMC (N7, N6, N5, N4P, N3E, N3P)
The Synopsys USB4 IP solution is based on the USB4 specification from the USB Implementer Forum (USB-IF). The USB4 IP offering includes device router,...
24
100.0
TSMC CLN4P 4nm DDR5 PHY - 6400Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
25
100.0
TSMC CLN7FF 7nm Clock Generator PLL - 800MHz-4000MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
26
100.0
TSMC CLN7FF 7nm DDR DLL - 250MHz-1250MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
27
100.0
TSMC CLN7FF 7nm Spread Spectrum PLL - 700MHz-3500MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
28
100.0
TSMC CLN7FF 7nm Ultra PLL - 15MHz-3000MHz
The Ultra PLL is designed with a state-of-the-art architecture using high-speed digital and analog circuits that offers exceptional performance, featu...
29
100.0
TSMC CLN7FFLVT 7nm DDR DLL - 360MHz-1800MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
30
100.0
TSMC CLN7FFLVT 7nm Deskew PLL - 300MHz-1500MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
31
100.0
TSMC CLN7FFLVT 7nm Multi Phase DLL - 1200MHz-6000MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
32
100.0
TSMC Crystal Oscillator (XTAL)
Universal, Mems- or Crystal-resonator compatible on-chip XO is a baseline for quality clock generation system. See our features list for more details....
33
100.0
TSMC FPD-Link / OpenLDI / LVDS forwarded clock SERDES Link
Universal LVDS-based interfaces supporting variety of Tx and Rx configurations....
34
100.0
TSMC GF Intel Low Phase Noise, High-performance Digital LC PLL
Fractional-N LC based frequency synthesizer with digital loop filter for high performance clock generation applications. See our features list for mor...
35
100.0
TSMC GF Intel Samsung Deskew Frequency Synthesizer PLL
High-bandwidth, De-Skew Frequency Synthesizer for minimizing clock tree timing uncertainty. See our features list for more details....
36
100.0
TSMC GF Intel Samsung Fractional-N Frequency Synthesizer PLL
Widely programmable fractional-N delta sigma frequency synthesizer with industry leading jitter performance. See our features list for more details....
37
100.0
TSMC GF Intel Samsung Integer-N Frequency Synthesizer PLL
Widely programmable integer-N frequency synthesizer with industry leading jitter performance and flexible power options. See our features list for mor...
38
100.0
TSMC GF LVDS Tx/Rx with optional CMOS I/O
Flexible I/O cell for data and clock applications that supports differential (and optionally single-ended) Tx and Rx capabilities with no external com...
39
100.0
TSMC Intel 32kHz Low-bandwidth Frequency Synthesizer PLL
Low-bandwidth, Ultra-Fast-Lock Frequency Synthesizer, capable to operate with a very low reference frequencies (32kHz - 33kHz). See our features list ...
40
100.0
TSMC Samsung GF Free-Running Oscillators
Low power relaxation oscillator is a programmable free-running clock generator for coarse clock generation. The design uses a relaxation oscillator wi...
41
100.0
TSMC Samsung GF Intel CML mux - on-chip clock buffer
Distribute high-performance clock across your chip with reduced supply-noise coupling. See our features list for more details....
42
99.0
TSMC CLN20SOC 20nm Clock Generator PLL - 700MHz-3500MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
43
99.0
TSMC CLN20SOC 20nm Deskew PLL - 700MHz-3500MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
44
90.0
TSMC CLN16FF+LL 16nm Ultra PLL - 15MHz-3000MHz
The Ultra PLL is designed with a state-of-the-art architecture using high-speed digital and analog circuits that offers exceptional performance, featu...
45
90.0
TSMC CLN20SOC 20nm Spread Spectrum PLL - 306MHz-1530MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
46
60.0
12-bit, 200 MSPS Analog-to-Digital Converter (ADC) IP Block TSMC 28nm
The A12B200M is a low-power, analog to digital converter (ADC) intellectually property (IP) design block. It is a hybrid successive approximatio...
47
60.0
IGAHBMV03A, TSMC CLN16FFC HBM PHY with CoWoS technology
IGAHBMV03A, TSMC CLN16FFC HBM PHY with CoWoS technology...
48
60.0
MIPI I3C PHY - TSMC (12nm, 7nm, 5nm, and 22nm) - GF 12nm
The I3C bus (incl. PHY) is used for various sensors in the mobile/automotive system where the Host transfers data and control between itself and vario...
49
60.0
TSMC CLN16FFGL+ HBM PHY IP
This datasheet describes GUC’s HBM (High Bandwidth Memory) PHY IP, which can be integrated with HBM memory controller to provide HBM functionality. Th...
50
60.0
TSMC CLN5FF HBM PHY IP
This datasheet describes GUC HBM (High Bandwidth Memory) PHY IP, which could be integrated with HBM memory controller to provide HBM functionality. Th...