651 1.0

Linear Regulator, ultra low quiescent current for retention mode in TSMC 40LP qLR-Aubrey-ref-1.62-3.63-0.55-2.5.02_TSMC_40_LP is an ultra-low quiescent LDO (Linear regulator) in TSMC 40LP....

652 1.0

Rising edge delay cell for control circuits, 10ns - TSMC 180nm Rising edge delay cell for control circuits, 10ns - TSMC 180nm...

653 1.0

Rising edge delay cell for control circuits, 20ns - TSMC 180nm Rising edge delay cell for control circuits, 20ns - TSMC 180nm...

654 1.0

Rising edge delay cell for control circuits, 40ns - TSMC 180nm Rising edge delay cell for control circuits, 40ns - TSMC 180nm...

655 1.0

BLE & BT 5.2 dual mode RFIP in TSMC 55nm~22nm ACTT’s Bluetooth 5.2 Radio IP available in 55nm~22nm logic process node. The radio supports BDR/EDR/BLE, which is fully compliant with Bluetooth® Low ...

656 1.0

BLE5.2 RFIP in TSMC 55nm~22nm ACTT’s Bluetooth Low Energy 5.2 Radio IP available from 55nm~22nm logic process node. The radio supports 1Mbps, 2Mbps and Long Range mode, which is fu...

657 1.0

BLE5.2 RFIP in TSMC 55nm~22nm ACTT’s Bluetooth Low Energy 5.2 Radio IP available from 55nm~22nm logic process node. The radio supports 1Mbps, 2Mbps and Long Range mode, which is fu...

658 1.0

Flexible 200kHz-20MHz Oscillator - Customizable frequency, Low Power in TSMC 40nm This macro-cell is a flexible general purpose oscillator core designed for TSMC 40nm CRN40LP CMOS technology. This IP can be customized upon customer ...

659 1.0

PLL for TSMC 130nm LP The OT3122t130 is a flexible clock multiplier PLL function with a wide range of input and output frequencies and is designed for the TSMC 0.13µ LP or ...

660 1.0

Always-on Voice Activity Detection interfacing with analog microphones in TSMC 22ULL WT-a-HD.03_TSMC_22_uLL is a mixed analog/digital Virtual Component (ViC) in TSMC 22ULL containing a Voice Activity Detection (VAD) engine for ultra-lo...

661 1.0

Always-on Voice Activity Detection interfacing with analog microphones in TSMC 40uLP WT-a-HD.01_TSMC_40_uLP is a mixed analog/digital Virtual Component (ViC) in TSMC 40uLP containing a Voice Activity Detection (VAD) engine for ultra lo...

662 1.0

Always-on Voice Activity Detection interfacing with analog microphones in TSMC 40uLP WT-a-HD.03_TSMC_40_uLP is a mixed analog/digital Virtual Component (ViC) in TSMC 40uLP containing a Voice Activity Detection (VAD) engine for ultra lo...

663 1.0

Always-on Voice Activity Detection interfacing with analog microphones in TSMC 55uLP WT-a-HD.03_TSMC_55_uLP is a mixed analog/digital Virtual Component (ViC) in TSMC 55uLP containing a Voice Activity Detection (VAD) engine for ultra lo...

664 1.0

PMOS 1.5A Over Current Protection - TSMC 180nm PMOS 1.5A Over Current Protection - TSMC 180nm...

665 1.0

NMOS Zero Crossing detector - TSMC 180nm NMOS Zero Crossing detector with Negative Over Current protection 1A - TSMC 180nm...

666 1.0

Combined Power On Reset and Brown Out Reset - High temperature (Grade 1, Tj=150°) in TSMC 40uLPeF POR-BOR-LS-1.62-3.63-0.55-3.3.02_TSMC_40_uLPeF is a combined Power On Reset and Brown Out Reset in TSMC 40uLPeF. Designed for extended mission profile...

667 1.0

Comparator for clock timing control - TSMC 180nm Comparator for clock timing control - TSMC 180nm...

668 1.0

Comparator for hysteretic mode - TSMC 180nm Comparator for hysteretic mode - TSMC 180nm...

669 1.0

Comparator with low-quiescent Hysteresis in TSMC 180eLL qCMPH-RR-2.0-3.63-1.2-1.98.02_TSMC_180_eLL is a comparator in TSMC 180eLL with low-quiescent hysteresis is designed to extract data from the RF wavefo...

670 1.0

Comparator with low-quiescent Hysteresis in TSMC 180eLL qCMPH-LP-RR-2.0-3.63-1.2-1.98.02_TSMC_180_eLL is a comparator with low-quiescent hysteresis, designed to extract data from the RF waveform in normal m...

671 1.0

Comparator with low-quiescent Hysteresis in TSMC 55uLPeF qCMPH-LP-RR-1.62-3.63.01_TSMC_55_uLPeF is a comparator in TSMC 55uLPeF with low-quiescent hysteresis, designed to extract data from the RF waveform in...

672 1.0

TON delay cell for hysteretic mode function - TSMC 180nm TON delay cell for hysteretic mode function - TSMC 180nm...

673 1.0

CoreDCDC: High-Performance DCDC for Power management - TSMC 180nm CoreDCDC: High-Performance DCDC for Power management - TSMC 180nm...

674 1.0

Low Power Clock Multiplier PLL for 40nm TSMC ULP CMOS The OT3135 is a flexible low power clock multiplier PLL function with a wide range of input and output frequencies, and is designed for TSMC 40nm, ULP...

675 1.0

Up to 105 dB of SNR, 24-bit mono CODEC with PDM to PWM transmodulator DAC and embedded regulator in TSMC 55LP sCODa-MT1-LR01_TSMC_55_LP is an audio CODEC in TSMC 55LP which provides the insurance of the best sound quality after integration into a SoC for low p...

676 1.0

Up to 105 dB of SNR, 24-bit mono CODEC with PDM to PWM transmodulator DAC and embedded regulator in TSMC 55LP mCODa-MT1-LR.01 is an audio CODEC in TSMC 55LP which provides the insurance of the best sound quality after integration into a SoC for IP Camera or Ca...

677 1.0

Up to 105 dB of SNR, 24-bit mono CODEC with PDM to PWM transmodulator DAC and embedded regulator in TSMC 65LP sCODa-MT1-LR_01.TSMC.65.LP is an audio CODEC in TSMC 65LP which provides the insurance of the best sound quality after integration into a SoC for low ...

678 1.0

USB 2.0 PHY TSMC 40LP The Arasan USB 2.0 PHY IP core is a transceiver compliant with the USB 2.0 Transceiver Macrocell Interface Plus (UTMI+) level 3 specification, for use...

679 1.0

USB 2.0 PHY TSMC 40LPeDRAM The Arasan USB 2.0 PHY IP core is a transceiver compliant with the USB 2.0 Transceiver Macrocell Interface Plus (UTMI+) level 3 specification, for use...

680 1.0

USB 2.0 PHY TSMC 55LP The Arasan USB 2.0 PHY IP core is a transceiver compliant with the USB 2.0 Transceiver Macrocell Interface Plus (UTMI+) level 3 specification, for use...

681 1.0

TSMC 0.13um 9track Standard Cell Library, 1.2v operating voltage TSMC 0.13um 9 track Standard Cell Library...

682 1.0

TSMC 0.13um LVDS Transmitter The LVDS transmitter is designed to support Single Link transmission between Host and Flat Panel Display with up to SXGA+ resolution and Dual Link tra...

683 1.0

TSMC 0.15umLV Single-Port/Dual-Port SRAM, Single-Port/Two-Port Register File and Diffusion ROM Compiler VeriSilicon TSMC 0.15um Low Voltage Process High-Speed Synchronous Memory Compiler optimized for Taiwan Semiconductor Manufacturing Corporation (TSMC)...

684 1.0

TSMC 12nm FFC 6track Delay Cells TSMC 12nm FFC 6 track High Density Delay Cells...

685 1.0

TSMC 55nm 1.0/2.5V 32768Hz Crystal Oscillator This is a 32768Hz crystal oscillator specifically designed for ultra-low power application. The sole power supply is 3.3V, but it can be as low as 1.6...

686 1.0

TSMC 55nm 12-Bit 8-Input 1M/200k SAR ADC This analog-to-digital converter uses Successive Approximation Register (SAR) architecture to achieve 12-bit resolution. The IP includes a core intern...

687 1.0

TSMC 55nm Analog 2-1 MUX This analog 2-1 MUX is designed for low speed application....

688 1.0

TSMC 55nm USB2.0 Dual Role PHY The USB 2.0 dual role PHY is a Hi-Speed USB peripheral transceiver IP that implements the Intel® UTMI standard. It provides a High/Full-Speed USB anal...

689 1.0

TSMC 65nm 12-Bit 8-Input 1M/200k SAR ADC This analog-to-digital converter uses Successive Approximation Register (SAR) architecture to achieve 12-bit resolution. The IP includes a core intern...

690 1.0

TSMC 65nm Analog 2-1 MUX This analog 2-1 MUX is designed for low speed application....

691 1.0

TSMC CL013G 130nm Clock Generator PLL - 136MHz-680MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

692 1.0

TSMC CL013G 130nm Clock Generator PLL - 272MHz-1360MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

693 1.0

TSMC CL013G 130nm Clock Generator PLL - 68MHz-340MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

694 1.0

TSMC CL013G 130nm DDR DLL - 107MHz-535MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

695 1.0

TSMC CL013G 130nm DDR DLL - 51MHz-255MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

696 1.0

TSMC CL013G 130nm DDR DLL - 68MHz-340MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

697 1.0

TSMC CL013G 130nm Deskew PLL - 136MHz-680MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

698 1.0

TSMC CL013G 130nm Deskew PLL - 272MHz-1360MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

699 1.0

TSMC CL013G 130nm Deskew PLL - 68MHz-340MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

700 1.0

TSMC CL013G 130nm General Purpose PLL - 136MHz-680MHz The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...