801 1.0

TSMC CL018LP 180nm Spread Spectrum PLL - 45MHz-225MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

802 1.0

TSMC CL018LP 180nm Spread Spectrum PLL - 90MHz-450MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

803 1.0

TSMC CL018LV 180nm Clock Generator PLL - 118MHz-590MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

804 1.0

TSMC CL018LV 180nm Clock Generator PLL - 236MHz-1180MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

805 1.0

TSMC CL018LV 180nm Clock Generator PLL - 59MHz-295MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

806 1.0

TSMC CL018LV 180nm DDR DLL - 101MHz-505MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

807 1.0

TSMC CL018LV 180nm DDR DLL - 48MHz-240MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

808 1.0

TSMC CL018LV 180nm DDR DLL - 64MHz-320MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

809 1.0

TSMC CL018LV 180nm Deskew PLL - 118MHz-590MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

810 1.0

TSMC CL018LV 180nm Deskew PLL - 236MHz-1180MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

811 1.0

TSMC CL018LV 180nm Deskew PLL - 59MHz-295MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

812 1.0

TSMC CL018LV 180nm Spread Spectrum PLL - 118MHz-590MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

813 1.0

TSMC CL018LV 180nm Spread Spectrum PLL - 236MHz-1180MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

814 1.0

TSMC CL018LV 180nm Spread Spectrum PLL - 59MHz-295MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

815 1.0

TSMC CLN28HP 28nm Clock Generator PLL - 175MHz-875MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

816 1.0

TSMC CLN28HP 28nm Clock Generator PLL - 350MHz-1750MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

817 1.0

TSMC CLN28HP 28nm Clock Generator PLL - 700MHz-3500MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

818 1.0

TSMC CLN28HP 28nm DDR DLL - 150MHz-750MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

819 1.0

TSMC CLN28HP 28nm DDR DLL - 200MHz-1000MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

820 1.0

TSMC CLN28HP 28nm DDR DLL - 316MHz-1580MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

821 1.0

TSMC CLN28HP 28nm Deskew PLL - 175MHz-875MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

822 1.0

TSMC CLN28HP 28nm Deskew PLL - 350MHz-1750MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

823 1.0

TSMC CLN28HP 28nm Deskew PLL - 700MHz-3500MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

824 1.0

TSMC CLN28HP 28nm General Purpose PLL - 350MHz-1750MHz The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...

825 1.0

TSMC CLN28HP 28nm Spread Spectrum PLL - 150MHz-750MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

826 1.0

TSMC CLN28HP 28nm Spread Spectrum PLL - 300MHz-1500MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

827 1.0

TSMC CLN28HP 28nm Spread Spectrum PLL - 600MHz-3000MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

828 1.0

TSMC CLN28HPL 28nm Clock Generator PLL - 110MHz-550MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

829 1.0

TSMC CLN28HPL 28nm Clock Generator PLL - 220MHz-1100MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

830 1.0

TSMC CLN28HPL 28nm Clock Generator PLL - 440MHz-2200MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

831 1.0

TSMC CLN28HPL 28nm DDR DLL - 117MHz-585MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

832 1.0

TSMC CLN28HPL 28nm DDR DLL - 156MHz-780MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

833 1.0

TSMC CLN28HPL 28nm DDR DLL - 246MHz-1230MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

834 1.0

TSMC CLN28HPL 28nm Deskew PLL - 110MHz-550MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

835 1.0

TSMC CLN28HPL 28nm Deskew PLL - 220MHz-1100MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

836 1.0

TSMC CLN28HPL 28nm Deskew PLL - 440MHz-2200MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

837 1.0

TSMC CLN28HPL 28nm General Purpose PLL - 220MHz-1100MHz The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...

838 1.0

TSMC CLN28HPL 28nm Multi Phase DLL - 110MHz-550MHz The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

839 1.0

TSMC CLN28HPL 28nm Multi Phase DLL - 220MHz-1100MHz The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

840 1.0

TSMC CLN28HPL 28nm Multi Phase DLL - 440MHz-2200MHz The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

841 1.0

TSMC CLN28HPL 28nm Spread Spectrum PLL - 192MHz-962MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

842 1.0

TSMC CLN28HPL 28nm Spread Spectrum PLL - 384MHz-1920MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

843 1.0

TSMC CLN28HPL 28nm Spread Spectrum PLL - 96MHz-481MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

844 1.0

TSMC CLN28HPM 28nm Clock Generator PLL - 175MHz-875MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

845 1.0

TSMC CLN28HPM 28nm Clock Generator PLL - 350MHz-1750MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

846 1.0

TSMC CLN28HPM 28nm Clock Generator PLL - 700MHz-3500MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

847 1.0

TSMC CLN28HPM 28nm DDR DLL - 150MHz-750MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

848 1.0

TSMC CLN28HPM 28nm DDR DLL - 200MHz-1000MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

849 1.0

TSMC CLN28HPM 28nm DDR DLL - 316MHz-1580MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

850 1.0

TSMC CLN28HPM 28nm Deskew PLL - 175MHz-875MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...