151 20.0

TSMC 5nm (N5) 1.2V/1.8V Failsafe GPIO Libraries, multiple metalstacks Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliability required for their ...

152 20.0

TSMC 5nm (N5) 1.2V/1.8V I3C Libraries Synopsys I3C I/O library supports a simplified system of connecting and managing multiple sensors in a device. Multiple sensor secondary devices can b...

153 20.0

TSMC 5nm (N5) 1.2V/1.8V/2.5V Failsafe GPIO Libraries Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliability required for their ...

154 20.0

TSMC 5nm (N5) 1.2V/1.8V/2.5V GPIO Libraries Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliability required for their ...

155 20.0

TSMC 5nm (N5) 1.2V/1.8V/2.5V GPIO Libraries, multiple metalstacks Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliability required for their ...

156 20.0

TSMC 5nm (N5) 1.8V SD/eMMC IO Synopsys SD/eMMC PHY provides an optimal balance for cost and performance for storage solutions. Synopsys SD/eMMC PHY is a hard IP that can be used to...

157 20.0

TSMC 5nm (N5) 1.8V SD/eMMC PHY Synopsys SD/eMMC PHY provides an optimal balance for cost and performance for storage solutions. Synopsys SD/eMMC PHY is a hard IP that can be used to...

158 20.0

TSMC 5nm (N5) 2.5V Basekit Libraries Synopsys I3C I/O library supports a simplified system of connecting and managing multiple sensors in a device. Multiple sensor secondary devices can b...

159 20.0

TSMC 5nm (N5)1.8V SD/eMMC PHY, multiple metalstacks Synopsys SD/eMMC PHY provides an optimal balance for cost and performance for storage solutions. Synopsys SD/eMMC PHY is a hard IP that can be used to...

160 20.0

TSMC 6nm (6FF) 3.3V GPIO Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliability required for their ...

161 20.0

TSMC 6nm (6FF) 3.3V SMBUS (I2C) IO Synopsys Inter-Integrated Circuit (I2C) I/O library is used for two wire interfaces to connect low-speed devices like EEPROM, A/D, and D/A converters ...

162 20.0

TSMC 6nm (N6) 3.3V Basekit Libraries Synopsys provides system-on-chip (SoC) designers with an extensive offering of high-quality, foundation IP, including memory compilers, logic librarie...

163 20.0

TSMC 7nm (7FF) 1.8V LVDS Synopsys Low Voltage Differential Signaling (LVDS) I/O library is a high-frequency interface that uses differential signals for data transmission. A f...

164 20.0

TSMC 7nm (7FF) 3.3V GPIO Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliability required for their ...

165 20.0

NVM FTP Trim in TSMC (180nm, 152nm, 90nm) Synopsys Non-Volatile Memory (NVM) IP provides reprogrammable NVM supporting up to 1 million bits (1Mbit) configurations in standard CMOS and BCD proc...

166 20.0

NVM MTP in TSMC (180nm, 152nm, 65nm, 40nm) Synopsys Non-Volatile Memory (NVM) IP provides reprogrammable NVM supporting up to 1 million bits (1Mbit) configurations in standard CMOS and BCD proc...

167 20.0

NVM OTP in TSMC (180nm, 152nm, 130nm, 110nm, 90nm, 65nm, 55nm, 40nm, 28nm, 22nm, 16nm, 12nm, N7, N6, N5, N4P) Synopsys Non-Volatile Memory (NVM) IP provides reprogrammable NVM supporting up to 1 million bits (1Mbit) configurations in standard CMOS and BCD proc...

168 20.0

PVT - Process, Voltage, and Temperature Monitor - TSMC 16nm The ODT-PVT-ULP-001C-16FFCT is an ultra-low power temperature, voltage and process monitor designed in a 16nm CMOS process. This IP operates over the ...

169 20.0

PVT Controller (Series 5) (Sub-system for complete PVT monitoring), TSMC N3EP, TSMC 12FFCP, TSMC N4P, TSMC N5, The PVT Controller provides a standard digital interface to the embedded Process, Voltage and Temperature (PVT) sensing Sub-System used to increase Sy...

170 20.0

PVT Controller (Series 5) (Sub-system for complete PVT monitoring), TSMC N4P. N5 , N6 The PVT Controller provides a standard digital interface to the embedded Process, Voltage and Temperature (PVT) sensing Sub-System used to increase Sy...

171 15.0

LDO Linear Voltage Regulator in TSMC 40LP iLR-Victoria-ref-1.62-3.63-0.8-2.5.02_TSMC_40_LP is a Low dropout linear voltage regulator in TSMC 40LP....

172 15.0

Library of LVDS IOs cells for TSMC 40LP The nSIO2000_TS40LP_2V5_1V1 library is an IO cells library combining various LVDS and general purpose I/O powered at 2.5V/1.1V or 1.8V/1.1V, designed ...

173 15.0

Library of LVDS IOs cells for TSMC 65LP The nSIO2000_TS65LP_2V5_1V2 library is an IO cells library combining various LVDS and general purpose I/O powered at 2.5V/1.2V or 1.8V/1.2V, designed ...

174 15.0

Ultra-low quiescent LDO voltage regulator in TSMC 22ULL qLR-Aubrey-ref-1.62-3.63-0.6-2.5.05_TSMC_22_ULL is an ultra-low quiescent LDO voltage regulator in TSMC 22ULL....

175 15.0

TSMC 12nm DDR3 and DDR4 Controller and PHY A DDR3/4 combo IP solution fabricated on TSMC 12nm process, integrating both controller and PHY. Supports DDR4 up to 3200Mbps and DDR3 up to 2133Mbps,...

176 15.0

TSMC 13.1Gbps Multi-Protocol Low-Power SerDes IP It is a 4-lane Serializer/Deserializer IP supporting data rates from 500Mbps to 13.1Gbps. It features flexible architecture for multiple high-speed se...

177 15.0

TSMC 25Gbps SerDes IP with Equalizer This is a high-performance, multi-protocol serial transceiver IP that supports data rates from 1Gbps to 26Gbps. Built on TSMC 12nm technology, it is d...

178 14.0

10Gbps Multi-Link and Multi-Protocol PCIe 3.1 PHY IP for TSMC Silicon-proven PHY for PCIe, USB, Ethernet, DisplayPort, and other protocols The Cadence® 10Gbps Multi-Link and Multi-Protocol PHY IP provides a flex...

179 14.0

Denali DDR PHY for TSMC LPDDR4/3, DDR4/3/3L, up to 4266Mbps The latest Denali high-speed DDR PHY IP is comprised of architectural improvements to its highly successful pre...

180 14.0

MIPI D-PHY for TSMC D-PHY physical layer Developed by experienced teams with industry-leading domain expertise and extensively validated by multiple hardware platforms, ...

181 14.0

USB 2.0 PHY for TSMC Proven PHY IP for USB Device, Host, and OTG with small footprint and low active power The ubiquity of USB 2.0 in devices makes it nearly mandatory fo...

182 12.0

FTP Non Volatile Memory for Standard TSMC 40nm ULP Process NSCore's TwinBit(TM)FTP is the only embedded CMOS, few-time programmable (FTP), non-volatile RAM IP of its kind, utilizing the 'hot carrier effect' to...

183 12.0

MTP Non Volatile Memory for TSMC 180nm BCD Process NSCore's TwinBit(TM) is the only embedded CMOS, multi-time programmable (MTP), non-volatile RAM IP of its kind, utilizing the 'hot carrier effect' to ...

184 11.0

MIPI C-PHY DSI TX (Transmitter/Host) IP in TSMC 22ULL The MXL-CPHY-2p5G-DSI-TX-T-22ULL is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificati...

185 11.0

MIPI C-PHY/D-PHY Combo 2-Lane CSI-2 TX+ IP in TSMC 40ULP The MXL-CDPHY-2L-CSI-2-TX+-40ULP is a high-frequency, low-power, low-cost, sourcesynchronous, physical Layer supporting the MIPI Alliance Specificatio...

186 11.0

MIPI C-PHY/D-PHY Combo DSI RX (Receiver) IP in TSMC 22ULP The MXL-CDPHY-DSI-RX-T-22ULP is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification f...

187 11.0

MIPI C-PHY/D-PHY Combo Universal IP, 4.5Gsps/4.5Gbps in TSMC 22ULP The MXL-CD-PHY-UNIV-T-22ULP is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification fo...

188 11.0

MIPI D-PHY CSI-2 TX (Transmitter) in TSMC 28HPC+ The MXL-DPHY-CSI-2-TX-T-28HPC+ is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification...

189 11.0

MIPI D-PHY CSI-2 TX+ (Transmitter) IP in TSMC 22ULL The MXL-DPHY-CSI-2-TX+-T-22ULL is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification...

190 11.0

MIPI D-PHY IP 4.5Gbps in TSMC N7 The MXL-DPHY-DSI-TX-T-N07 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification for ...

191 11.0

MIPI D-PHY Universal IP in TSMC 28HPC+ The MXL-DPHY-UNIV-T-28HPC+ is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificatio...

192 11.0

MIPI M-PHY HS-G4 IP (M-PHY v4.1) in TSMC 40G The MXL-MIPI-M-PHY is a high-frequency low-power, low-cost, Physical Layer IP compliant with the MIPI Alliance Standard for M-PHY. The IP can be used ...

193 11.0

Automotive MIPI C-PHY/D-PHY Combo CSI-2 TX 4.5Gsps/trio in TSMC 28HPC+ The AUTO-MXL-CDPHY-4p5G-CSI-2-TX-T-28HPC+ is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Sp...

194 11.0

Automotive MIPI D-PHY CSI-2 RX (Receiver) in TSMC 16FFC The AUTO-MXL-DPHY-CSI-2-RX-T-16FFC is a high-frequency, low-power, low-cost, source-synchronous, Physical Layer supporting the MIPI Alliance Specifica...

195 11.0

Automotive MIPI D-PHY CSI-2 RX (Receiver) in TSMC 28HPC+ The AUTO-MXL-DPHY-CSI-2-RX is a high-frequency low-power, low-cost, source-synchronous, Physical Layer supporting the MIPI Alliance Specification for ...

196 11.0

Automotive MIPI D-PHY CSI-2 RX+ IP in TSMC 28HPC+ The AUTO-MXL-DPHY-CSI-RX+-T-28HPC+ is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specifica...

197 11.0

Automotive MIPI D-PHY DSI TX (Transmitter) in TSMC 28HPC+ The AUTO-MXL-D-PHY-DSI-TX-T-28HPC+ is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specifica...

198 11.0

NVM Anti-Fuse OTP NeoFuse in TSMC (130nm, 110nm, 90nm, 80nm, 55nm, 40nm, 28nm, 22nm, 16nm, 12nm, N7, N6, N5, N5A, N4P) NeoFuse is a small-form factor logic NVM technology with the advantages of working on low power and being highly reliable and secure. It provides non-...

199 11.0

NVM EEPROM NeoEE in TSMC (180nm, 160nm, 130nm) eMemory's NeoEE IP is a cost-effective embedded EEPROM solution for both foundries & customers. No additional masks are required, and NeoEE gives foun...

200 11.0

NVM eFlash NeoFlash in TSMC (160nm) eMemory's NeoFlash IP is a cost-effective embedded Flash solution for both foundries & customers. Only 2~3 additional masks are required, and NeoFlash...