Design & Reuse
Catalog of SIP Cores
System on Chip design resources
3072 IP
2451
0.0
TSMC CLN28HP 28nm DDR5 PHY - 3200Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
2452
0.0
TSMC CLN28HP 28nm LPDDR3 PHY - 2133Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
2453
0.0
TSMC CLN28HP 28nm LPDDR4 PHY - 2933Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
2454
0.0
TSMC CLN28HP 28nm LPDDR5 PHY - 3200Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
2455
0.0
TSMC CLN28HP 28nm Multi Phase DLL - 175MHz-875MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
2456
0.0
TSMC CLN28HP 28nm Multi Phase DLL - 350MHz-1750MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
2457
0.0
TSMC CLN28HP 28nm Multi Phase DLL - 700MHz-3500MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
2458
0.0
TSMC CLN28HP 28nm Ultra PLL - 15MHz-3000MHz
The Ultra PLL is designed with a state-of-the-art architecture using high-speed digital and analog circuits that offers exceptional performance, featu...
2459
0.0
TSMC CLN28HPC 12Bit 125MHz SAR ADC
IGAADCT10A is a SAR ADC with 12-bit resolution. It is used for high speed and high analog input bandwidth IQ channels communication system. A power d...
2460
0.0
TSMC CLN28HPC 28nm DDR3 PHY - 2133Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
2461
0.0
TSMC CLN28HPC 28nm DDR4 PHY - 2933Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
2462
0.0
TSMC CLN28HPC 28nm DDR5 PHY - 3200Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
2463
0.0
TSMC CLN28HPC 28nm IoT PLL - 60MHz-875MHz
The IoT PLL is designed for very low power, sipping only 45uW at 30MHz and running from core power. It has a wide frequency range with multiplication ...
2464
0.0
TSMC CLN28HPC 28nm LPDDR3 PHY - 2133Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
2465
0.0
TSMC CLN28HPC 28nm LPDDR4 PHY - 2933Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
2466
0.0
TSMC CLN28HPC 28nm LPDDR5 PHY - 3200Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
2467
0.0
TSMC CLN28HPC 28nm Ultra PLL - 15MHz-3000MHz
The Ultra PLL is designed with a state-of-the-art architecture using high-speed digital and analog circuits that offers exceptional performance, featu...
2468
0.0
TSMC CLN28HPC ABB Analog Front-End
The IGAAFET06A which contains ADCs, DACs and PLLs is an analog front-end (AFE) IP for communication applications. This IP includes five 2-channel ADCs...
2469
0.0
TSMC CLN28HPC+ Derivative IP of IGASERT06A Enterprise Multi-Standard SerDes
The GUC's Quad-Lane EMS-XT PHY SerDes supports multiple high speed wire-line communication standards. Supported standards include CEI-28G-VSR, CEI-25G...
2470
0.0
TSMC CLN28HPC+ 10-bit 2.4GHz Current Steering DAC [2ch]
The IGADACT08A is a general-purpose two-channel digital-to-analog converter with 10-bit resolution. The IGADACT08A contains two serializers, two digit...
2471
0.0
TSMC CLN28HPC+ 10bit 2.4G SAR ADC [2ch]
IGAADCT09B is a two-channel Time-Interleave-SAR ADC with 10-bit resolution. It is used for high speed and high analog input bandwidth IQ channels comm...
2472
0.0
TSMC CLN28HPC+ 12-bit 5MHz R2R DAC [1ch]
IGADACT09A is a general-purpose digital-to-analog converter with 12-bit resolution. The sampling rate is up to 5M smples per second. The IGADACT09A is...
2473
0.0
TSMC CLN28HPC+ 28nm Clock Generator PLL - 180MHz-900MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2474
0.0
TSMC CLN28HPC+ 28nm Clock Generator PLL - 360MHz-1800MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2475
0.0
TSMC CLN28HPC+ 28nm Clock Generator PLL - 720MHz-3600MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2476
0.0
TSMC CLN28HPC+ 28nm DDR DLL - 165MHz-825MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2477
0.0
TSMC CLN28HPC+ 28nm DDR DLL - 220MHz-1100MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2478
0.0
TSMC CLN28HPC+ 28nm DDR DLL - 347MHz-1735MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2479
0.0
TSMC CLN28HPC+ 28nm Deskew PLL - 180MHz-900MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2480
0.0
TSMC CLN28HPC+ 28nm Deskew PLL - 360MHz-1800MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2481
0.0
TSMC CLN28HPC+ 28nm Deskew PLL - 720MHz-3600MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2482
0.0
TSMC CLN28HPC+ 28nm General Purpose PLL - 360MHz-1800MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...
2483
0.0
TSMC CLN28HPC+ 28nm IoT PLL - 60MHz-900MHz
The IoT PLL is designed for very low power, sipping only 45uW at 30MHz and running from core power. It has a wide frequency range with multiplication ...
2484
0.0
TSMC CLN28HPC+ 28nm Multi Phase DLL - 180MHz-900MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
2485
0.0
TSMC CLN28HPC+ 28nm Multi Phase DLL - 360MHz-1800MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
2486
0.0
TSMC CLN28HPC+ 28nm Multi Phase DLL - 720MHz-3600MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
2487
0.0
TSMC CLN28HPC+ 28nm Spread Spectrum PLL - 154MHz-771MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2488
0.0
TSMC CLN28HPC+ 28nm Spread Spectrum PLL - 308MHz-1540MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2489
0.0
TSMC CLN28HPC+ 28nm Spread Spectrum PLL - 618MHz-3090MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2490
0.0
TSMC CLN28HPC+ 28nm Ultra PLL - 15MHz-3000MHz
The Ultra PLL is designed with a state-of-the-art architecture using high-speed digital and analog circuits that offers exceptional performance, featu...
2491
0.0
TSMC CLN28HPC+LVT 28nm Clock Generator PLL - 225MHz-1125MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2492
0.0
TSMC CLN28HPC+LVT 28nm Clock Generator PLL - 450MHz-2250MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2493
0.0
TSMC CLN28HPC+LVT 28nm Clock Generator PLL - 900MHz-4500MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2494
0.0
TSMC CLN28HPC+LVT 28nm DDR DLL - 195MHz-975MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2495
0.0
TSMC CLN28HPC+LVT 28nm DDR DLL - 260MHz-1300MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2496
0.0
TSMC CLN28HPC+LVT 28nm DDR DLL - 411MHz-2055MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2497
0.0
TSMC CLN28HPC+LVT 28nm Deskew PLL - 225MHz-1125MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2498
0.0
TSMC CLN28HPC+LVT 28nm Deskew PLL - 450MHz-2250MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2499
0.0
TSMC CLN28HPC+LVT 28nm Deskew PLL - 900MHz-4500MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2500
0.0
TSMC CLN28HPC+LVT 28nm General Purpose PLL - 450MHz-2250MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...