Design & Reuse
Catalog of SIP Cores
System on Chip design resources
3072 IP
2751
0.0
TSMC CLN4P 4nm LPDDR3 PHY - 2133Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
2752
0.0
TSMC CLN4P 4nm LPDDR4 PHY - 4266Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
2753
0.0
TSMC CLN4P 4nm LPDDR5 PHY - 6400Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
2754
0.0
TSMC CLN4P 4nm Multi Phase DLL - 200MHz-1000MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
2755
0.0
TSMC CLN4P 4nm Multi Phase DLL - 400MHz-2000MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
2756
0.0
TSMC CLN4P 4nm Multi Phase DLL - 800MHz-4000MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
2757
0.0
TSMC CLN4P 4nm Spread Spectrum PLL - 175MHz-875MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2758
0.0
TSMC CLN4P 4nm Spread Spectrum PLL - 350MHz-1750MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2759
0.0
TSMC CLN4P 4nm Spread Spectrum PLL - 700MHz-3500MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2760
0.0
TSMC CLN4P 4nm Ultra PLL - 15MHz-3000MHz
The Ultra PLL is designed with a state-of-the-art architecture using high-speed digital and analog circuits that offers exceptional performance, featu...
2761
0.0
TSMC CLN4PLVT 4nm Clock Generator PLL - 1200MHz-6000MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2762
0.0
TSMC CLN4PLVT 4nm Clock Generator PLL - 300MHz-1500MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2763
0.0
TSMC CLN4PLVT 4nm Clock Generator PLL - 600MHz-3000MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2764
0.0
TSMC CLN4PLVT 4nm DDR DLL - 270MHz-1350MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2765
0.0
TSMC CLN4PLVT 4nm DDR DLL - 360MHz-1800MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2766
0.0
TSMC CLN4PLVT 4nm DDR DLL - 568MHz-2840MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2767
0.0
TSMC CLN4PLVT 4nm DDR3 PHY - 2133Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
2768
0.0
TSMC CLN4PLVT 4nm DDR4 PHY - 4266Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
2769
0.0
TSMC CLN4PLVT 4nm DDR5 PHY - 6400Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
2770
0.0
TSMC CLN4PLVT 4nm Deskew PLL - 1200MHz-6000MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2771
0.0
TSMC CLN4PLVT 4nm Deskew PLL - 300MHz-1500MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2772
0.0
TSMC CLN4PLVT 4nm Deskew PLL - 600MHz-3000MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2773
0.0
TSMC CLN4PLVT 4nm General Purpose PLL - 600MHz-3000MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...
2774
0.0
TSMC CLN4PLVT 4nm LPDDR3 PHY - 2133Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
2775
0.0
TSMC CLN4PLVT 4nm LPDDR4 PHY - 4266Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
2776
0.0
TSMC CLN4PLVT 4nm LPDDR5 PHY - 6400Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
2777
0.0
TSMC CLN4PLVT 4nm Multi Phase DLL - 1200MHz-6000MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
2778
0.0
TSMC CLN4PLVT 4nm Multi Phase DLL - 300MHz-1500MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
2779
0.0
TSMC CLN4PLVT 4nm Multi Phase DLL - 600MHz-3000MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
2780
0.0
TSMC CLN4PLVT 4nm Spread Spectrum PLL - 1050MHz-5250MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2781
0.0
TSMC CLN4PLVT 4nm Spread Spectrum PLL - 262MHz-1310MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2782
0.0
TSMC CLN4PLVT 4nm Spread Spectrum PLL - 524MHz-2620MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2783
0.0
TSMC CLN4PLVT 4nm Ultra PLL - 15MHz-3000MHz
The Ultra PLL is designed with a state-of-the-art architecture using high-speed digital and analog circuits that offers exceptional performance, featu...
2784
0.0
TSMC CLN55GP 55nm Ultra PLL - 15MHz-3000MHz
The Ultra PLL is designed with a state-of-the-art architecture using high-speed digital and analog circuits that offers exceptional performance, featu...
2785
0.0
TSMC CLN55LP 12-bit 5MHz R2R DAC [1ch]
IGADACR10A is a general-purpose digital-to-analog converter with 12-bit resolution. The sampling rate is up to 5M smples per second. IGADACR10A is com...
2786
0.0
TSMC CLN55LP 12Bit 120MHz Pipelined ADC [1ch]
The IGAADCR10A is a general-purpose analog to digital con-verter (ADC) with 12-bit resolution. This ADC is based on pipe-lined architecture and the sa...
2787
0.0
TSMC CLN55LP 12Bit 80MHz SAR ADC
IGAADCR16A is a general-purpose analog to digital converter (ADC) with 12-bit resolution. This ADC is based on SAR architecture and the sampling rate ...
2788
0.0
TSMC CLN55LP 55nm IoT PLL - 30MHz-300MHz
The IoT PLL is designed for very low power, sipping only 45uW at 30MHz and running from core power. It has a wide frequency range with multiplication ...
2789
0.0
TSMC CLN55LP 55nm Ultra PLL - 15MHz-3000MHz
The Ultra PLL is designed with a state-of-the-art architecture using high-speed digital and analog circuits that offers exceptional performance, featu...
2790
0.0
TSMC CLN5FF Chip Performance Monitor
IGACPMY01A is an on-chip performance monitor which contains a maximum of 32 customized multiple ring oscillators. This macro is one sensor unit of chi...
2791
0.0
TSMC CLN5FF Digital Delay-Locked Loop
IGADLLY02A digital delay-locked loop is a high performance DLL for flash interface applications. IGADLLY02A is a high-speed Digital Delay-Locked Loop ...
2792
0.0
TSMC CLN5FF GLink 2.0 Die-to-Die PHY
IGPD2DY01A is a high-speed Die-to-Die interface PHY that transmits data through TSMC advanced packaging solutions: Integrated Fan-Out (InFO) with RDL ...
2793
0.0
TSMC CLN5FF GLink 2.3LL Die-to-Die PHY
IGAD2DY04A is a high-speed die-to-die interface PHY which transmits data through TSMC advanced packaging solutions: Integrated Fan-Out (InFO) with RDL...
2794
0.0
TSMC CLN5FF GLink GPIO
IGID2DY01A GLink GPIO is one of the GLink series IPs. It provides low speed (up to 500 MHz) connection between two dies without requiring any initiali...
2795
0.0
TSMC CLN5FF GLink-3D Die-to-Die Master PHY
IGAD2DY02A is a GLink-3D high speed die-to-die interface Master PHY. It is used to transmit data between dies and assembled using TSMC System on Integ...
2796
0.0
TSMC CLN5FF High Density Single Port SRAM Compiler
IGMSHDY01A is a synchronous ULVT / LVT periphery high density single port SRAM compiler. It is developed with TSMC 5 nm 0.75 V/1.2 V CMOS LOGIC FinFET...
2797
0.0
TSMC CLN5P 5nm Clock Generator PLL - 200MHz-1000MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2798
0.0
TSMC CLN5P 5nm Clock Generator PLL - 400MHz-2000MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2799
0.0
TSMC CLN5P 5nm Clock Generator PLL - 800MHz-4000MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2800
0.0
TSMC CLN5P 5nm DDR DLL - 188MHz-940MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...