Design & Reuse
Catalog of SIP Cores
System on Chip design resources
3072 IP
2901
0.0
TSMC CLN6FFLVT 6nm Deskew PLL - 1200MHz-6000MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2902
0.0
TSMC CLN6FFLVT 6nm Deskew PLL - 300MHz-1500MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2903
0.0
TSMC CLN6FFLVT 6nm Deskew PLL - 600MHz-3000MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2904
0.0
TSMC CLN6FFLVT 6nm General Purpose PLL - 600MHz-3000MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...
2905
0.0
TSMC CLN6FFLVT 6nm LPDDR3 PHY - 2133Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
2906
0.0
TSMC CLN6FFLVT 6nm LPDDR4 PHY - 4266Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
2907
0.0
TSMC CLN6FFLVT 6nm LPDDR5 PHY - 6400Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
2908
0.0
TSMC CLN6FFLVT 6nm Multi Phase DLL - 1200MHz-6000MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
2909
0.0
TSMC CLN6FFLVT 6nm Multi Phase DLL - 300MHz-1500MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
2910
0.0
TSMC CLN6FFLVT 6nm Multi Phase DLL - 600MHz-3000MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
2911
0.0
TSMC CLN6FFLVT 6nm Spread Spectrum PLL - 1050MHz-5250MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2912
0.0
TSMC CLN6FFLVT 6nm Spread Spectrum PLL - 262MHz-1310MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2913
0.0
TSMC CLN6FFLVT 6nm Spread Spectrum PLL - 524MHz-2620MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2914
0.0
TSMC CLN6FFLVT 6nm Ultra PLL - 15MHz-3000MHz
The Ultra PLL is designed with a state-of-the-art architecture using high-speed digital and analog circuits that offers exceptional performance, featu...
2915
0.0
TSMC CLN7FF 10-Bit 4Msps SAR ADC [12ch]
IGAADCX03A is a one-channel general-purpose analog-to-digital converter with 10-bit resolution and the sampling rate can be up to 4 MHz. The converted...
2916
0.0
TSMC CLN7FF 12-bit 16 Msps SAR ADC [32ch]
IGAADCX04A is a general-purpose analog-to-digital converter (ADC) with 12-bit resolution. This ADC is based on SAR architecture and the sampling rate ...
2917
0.0
TSMC CLN7FF 7nm Clock Generator PLL - 200MHz-1000MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2918
0.0
TSMC CLN7FF 7nm Clock Generator PLL - 400MHz-2000MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2919
0.0
TSMC CLN7FF 7nm DDR DLL - 188MHz-940MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2920
0.0
TSMC CLN7FF 7nm DDR DLL - 395MHz-1975MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2921
0.0
TSMC CLN7FF 7nm DDR3 PHY - 2133Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
2922
0.0
TSMC CLN7FF 7nm DDR4 PHY - 4266Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
2923
0.0
TSMC CLN7FF 7nm DDR5 PHY - 6400Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
2924
0.0
TSMC CLN7FF 7nm Deskew PLL - 200MHz-1000MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2925
0.0
TSMC CLN7FF 7nm Deskew PLL - 800MHz-4000MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2926
0.0
TSMC CLN7FF 7nm LPDDR3 PHY - 2133Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
2927
0.0
TSMC CLN7FF 7nm LPDDR4 PHY - 4266Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
2928
0.0
TSMC CLN7FF 7nm LPDDR5 PHY - 6400Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
2929
0.0
TSMC CLN7FF 7nm Multi Phase DLL - 200MHz-1000MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
2930
0.0
TSMC CLN7FF 7nm Multi Phase DLL - 400MHz-2000MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
2931
0.0
TSMC CLN7FF 7nm Spread Spectrum PLL - 175MHz-875MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2932
0.0
TSMC CLN7FF 7nm Spread Spectrum PLL - 350MHz-1750MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2933
0.0
TSMC CLN7FF Chip Performance Monitor
IGACPMX01A is an on-chip performance monitor which contains a maximum of 32 customized multiple ring oscillators. This macro is one sensor unit of chi...
2934
0.0
TSMC CLN7FF General Purpose PLL
The IGAPLLX01A PLL-based clock generating IP integrates a voltage-controlled oscillator, a phase frequency detector, a charge pump, a loop filter, and...
2935
0.0
TSMC CLN7FF GLink-3D Die-to-Die Slave PHY
IGAD2DX03A is a GLink-3D high speed die-to-die interface Slave PHY. It is used to transmit data between dies and assembled using TSMC System on Integr...
2936
0.0
TSMC CLN7FF Lane-based 1.5 – 22.5 Gbps Enterprise Multi-Standard SerDes
The GUC's EMS-PHY SerDes supports multiple high speed wire-line communication standards. Supported standards include PCIe Gen1-Gen4, SAS-4 G1-G5 and a...
2937
0.0
TSMC CLN7FF Synchronous One Port Register File Compiler
The IGMSLRX01A is a synchronous, ultra-high density one port register file compiler. It is developed with TSMC 7 nm 0.75 V/1.8 V CMOS LOGIC FinFET Pro...
2938
0.0
TSMC CLN7FF Ternary Content Addressable Memory Compiler with Column Redundancy
IGMTLSX06A is a synchronous LVT / ULVT periphery high-density ternary content addressable memory (TCAM) with column redundancy feature. It is develope...
2939
0.0
TSMC CLN7FFLVT 7nm Clock Generator PLL - 1200MHz-6000MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2940
0.0
TSMC CLN7FFLVT 7nm Clock Generator PLL - 300MHz-1500MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2941
0.0
TSMC CLN7FFLVT 7nm Clock Generator PLL - 600MHz-3000MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2942
0.0
TSMC CLN7FFLVT 7nm DDR DLL - 270MHz-1350MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2943
0.0
TSMC CLN7FFLVT 7nm DDR DLL - 568MHz-2840MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2944
0.0
TSMC CLN7FFLVT 7nm DDR3 PHY - 2133Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
2945
0.0
TSMC CLN7FFLVT 7nm DDR4 PHY - 4266Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
2946
0.0
TSMC CLN7FFLVT 7nm DDR5 PHY - 6400Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
2947
0.0
TSMC CLN7FFLVT 7nm Deskew PLL - 1200MHz-6000MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2948
0.0
TSMC CLN7FFLVT 7nm Deskew PLL - 600MHz-3000MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2949
0.0
TSMC CLN7FFLVT 7nm General Purpose PLL - 600MHz-3000MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...
2950
0.0
TSMC CLN7FFLVT 7nm LPDDR3 PHY - 2133Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...