Design & Reuse
Catalog of SIP Cores
System on Chip design resources
1293 IP
1
10.0
Visibility Improver IP
“LucidEye” improves the visibility of unclear images such as those deteriorated due to weather conditions (snow, haze, or fog), and dark images due t...
2
5.0
H.264/AVC 1080 60p Baseline Profile Decoder
TMC's TM21745 is a decoder IP core that is compliant with ISO/IEC 14496-10 | ITU-T Rec.H.264. Using TMC's original computer algorithm, we have real...
3
5.0
H.264/AVC 1080 60p Baseline Profile Encoder
- TMC's TM21745 is an encoder IP core that is compliant with ISO/IEC 14496-10 | ITU-T Rec.H.264. - Using TMC's original computer algorithm, we have...
4
5.0
H.264/AVC 4K 60p High Profile Decoder
- TMC's H.264 core (RTL- IP) is designed to be compliant with the H.264 4K Video, which is a highly efficient image compression method standardized in...
5
5.0
H.264/AVC 4K 60p High Profile Encoder
- TMC's H.264 core (RTL- IP) is designed to be compliant with the H.264 4K Video, which is a highly efficient image compression method standardized in...
6
5.0
H.265/HEVC 422 10bit Decoder for 4K
DMNA realizes real time Encoding of 4K (3840 x 2160) and 8K (7680 x 4320) / 60fps video stream compliant with H.265 / HEVC...
7
5.0
H.265/HEVC 422 10bit Encoder for 4K
DMNA realizes real time Encoding of 4K (3840 x 2160) and 8K (7680 x 4320) / 60fps video stream compliant with H.265 / HEVC...
8
5.0
H.265/HEVC H.264/AVC 422 12bit Multi-Codec for 8K
TMC’s HEVC/AVC Multi-Codec IP Core for 4K/8K are designed to be compliant with the H.264 4K (4096 x 2160) Video and H.265 8K (8192 x 4320) Vid...
9
5.0
1:2 Fixed Length Visually Lossless Compression/Decompression
Suppressing the degradation of image quality by the original comp./decomp. processing, drastic reductions of Memory amount and Bandwidth could be real...
10
5.0
1:2 Fixed Length Visually Lossless Compression/Decompression
Suppressing the degradation of image quality by the original comp./decomp. processing, drastic reductions of Memory amount and Bandwidth could be real...
11
5.0
1:3 Fixed Length Visually Lossless Compression/Decompression
Suppressing the degradation of image quality by the original comp./decomp. processing, drastic reductions of Memory amount and Bandwidth could be real...
12
5.0
1:3 Fixed Length Visually Lossless Compression/Decompression
Suppressing the degradation of image quality by the original comp./decomp. processing, drastic reductions of Memory amount and Bandwidth could be real...
13
5.0
1:3 Fixed Length Visually Lossless Compression/Decompression
Suppressing the degradation of image quality by the original comp./decomp. processing, drastic reductions of Memory amount and Bandwidth could be real...
14
5.0
1:4 Fixed Length Visually Lossless Compression/Decompression
Suppressing the degradation of image quality by the original comp./decomp. processing, drastic reductions of Memory amount and Bandwidth could be real...
15
5.0
1:4 Fixed Length Visually Lossless Compression/Decompression
Suppressing the degradation of image quality by the original comp./decomp. processing, drastic reductions of Memory amount and Bandwidth could be real...
16
5.0
1:6 Fixed Length Visually Lossless Compression/Decompression
Suppressing the degradation of image quality by the original comp./decomp. processing, drastic reductions of Memory amount and Bandwidth could be real...
17
5.0
1:6 Fixed Length Visually Lossless Compression/Decompression
Suppressing the degradation of image quality by the original comp./decomp. processing, drastic reductions of Memory amount and Bandwidth could be real...
18
5.0
Visually LossLess compression hardware RTL core that complies with ISO/IEC-21122-1 (JPEG XS)
TMC’s JPEG XS encoder / decoder IP is Visually LossLess compression / decompression hardware RTL core that complies with ISO/IEC-21122-1 (JPEG XS). T...
19
5.0
Visually LossLess decompression hardware RTL core that complies with ISO/IEC-21122-1 (JPEG XS)
TMC’s JPEG XS encoder / decoder IP is Visually LossLess decompression hardware RTL core that complies with ISO/IEC-21122-1 (JPEG XS). The logic gate ...
20
5.0
Compact LossLess Decoder RTL Core
...
21
5.0
Compact LossLess Encoder RTL Core
...
22
5.0
Lossless / Near lossless Encoder / Decoder Hardware IP
- Lossless / near lossless hardware encoder and decoder IP that features compact and high speed with TMC original algorithm. - Optimized logic gate...
23
5.0
JPEG Decoder 1-pixel/clock
- Baseline JPEG encoder/decoder described in RTL compliant with ISO/IEC 10918-1 - High speed processing with low clock frequency - Suitable for ...
24
5.0
JPEG Encoder 1-pixel/clock
- Baseline JPEG encoder/decoder described in RTL compliant with ISO/IEC 10918-1 - High speed processing with low clock frequency - Suitable for ...
25
5.0
Frame Rate Converter for 4K
TMC’s FRUC (Frame Rate Up-Converter) for 4K RTL Core utilizes proprietary ”DMNA- MEMC” (Motion Estimation and Motion Compensation) algorithm which gen...
26
0.0
H.264 BP Full HD CV Encoder/Decoder
H.264 CV is an encoder / decoder IP core that is compliant with H.264(ISO/IEC14496-10). The number of logic gate count and internal memory capacity ar...
27
0.0
H.264 BP SD Encoder/Decoder SW
TMC s H.264 video codec ( encoder&decoder ) software is designed to be compliant with H.264 Visual （ high-efficiency image compression standard standa...
28
0.0
H.264 CVF Encoder/Decoder for FPGA
H.264 CVF is an encoder / decoder IP core that is compliant with H.264(ISO/IEC14496-10). The number of logic gate count and internal memory capacity a...
29
0.0
H.264 MP Encoder/Decoder SW
TMC s H.264 video codec (encoder&decoder) software is designed to be compliant with H.264 Visual (high-efficiency image compression standard standardi...
30
0.0
High Speed JPEG Encoder
Baseline JPEG encoder/decoder described in RTL compliant with ISO/IEC 10918-1 High speed processing with low clock frequency Suitable for digital stil...
31
0.0
Visually LossLess compression / decompression hardware RTL core that complies with ISO/IEC-21122-1 (JPEG XS)
TMC s JPEG XS encoder / decoder IP is Visually LossLess compression / decompression hardware RTL core that complies with ISO/IEC-21122-1 (JPEG XS). Th...
32
0.0
DMNA V2 Encoder/Decoder (SW)
DMNA-V2 is TMC s original video CODEC (encoder & decoder) software. Comparing with H.264, DMNA-V2 has higher and suitable compression efficiency for t...
33
0.0
AMR Encoder/Decoder
TMC’s AMR(Adaptive Multi Rate) Speech Encoder is designed to be compliant with 3GPP(The 3rd Generation Partnership Project), and has the feature...
34
0.0
Color Filter Software Core
TMC developed Color Filter software for improving video quality on potable devices. Color Filter processed on decoding stream makes foggy picture of...
35
0.0
JPEG Encoder/Decoder
Baseline JPEG encoder/decoder described in RTL compliant with ISO/IEC 10918-1. High speed processing with low clock frequency.Suitable for digital sti...
36
0.0
MPEG4 SP SD Encoder/Decoder SW
TMC s MPEG4 video codec (encoder&decoder) software is designed to be compliant with MPEG4 Visual (high-efficiency image compression standard standardi...
37
0.0
Frame Rate Converter
TMC developed FRC ( Frame Rate Converter) software interfacing with YUV video format. FRC software generates new frames after decoding stream regardle...
38
10.0
Library of mathematical and floating point (FP) components
Optimized for efficient hardware implementation, the Synopsys Foundation Cores include a library of mathematical and floating point (FP) components th...
39
50.0
512x8 Bits OTP (One-Time Programmable) IP, TSM- 12FFC 0.8V/1.8V Process
The ATO00512X8TS012FFC8EA is organized as 512 bits by 8 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in 12nmFFC stand...
40
20.0
JPEG Codec Full HD(YUV422) 30fps@63MHz. (2Sample/clk)
The KJN-F4 conform to the JPEG baseline format for compressing/decompressing still images. The F series is a product optimized for FPGA....
41
20.0
Original Lossless codec IP core - Full HD 30fps@126MHz (1Sample/clk)
KJN-S1 is able to get Higher performance lossless Compression by original algorithm. This product achieves a smaller circuit scale and higher compress...
42
10.0
64x8 Bits OTP (One-Time Programmable) IP, UM- 55nm ULP standard CMOS core logic Process
The AT64X8U55ULP6AA is organized as a 64-word by 8 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in 55nm ULP standard ...
43
10.0
64x8 Bits OTP (One-Time Programmable) IP, X-FA- 0.18μm XH018 Modular Mixed Signal Process
The ATO00064X8XH180TG33NA is organized as a 64-bit by 8 one-time programmable (OTP). This is a type of non-volatile memory fabricated in X-FA- 0.18μm ...
44
10.0
256x8 Bits OTP (One-Time Programmable) IP, TSM- 22ULP 0.8V/1.8V process
The AT256X8T22ULP6AA is organized as 256 bits by 8 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in TSM- 22nm ULP CMOS...
45
10.0
768x39 Bits OTP (One-Time Programmable) IP, TSM- 55ULP 0.9V–1.2V / 2.5V Process
The ATO0768X39TS055ULP4NA is organized as 768x39 one-time programmable (OTP). This is a type of non-volatile memory fabricated in TSM- 55nm LP 1.2V/2....
46
10.0
16Kx33 Bits OTP (One-Time Programmable) IP, TSM- 40LP 1.1V/2.5V Process
The ATO016KX33TS040LLP7ZA is organized as 16K-bits by 33 one-time programmable (OTP). This is a type of non-volatile memory fabricated in TSM- 40nm ...
47
10.0
Camera ISP IP (Competitive Performance) - ZELKOVA
Zelkova is a comprehensive ISP IP that includes many functionalities for image processing applications. It is optimized for low light environment appl...
48
10.0
Camera ISP IP (High Performance) - METASEQUOIA
METASEQUOIA is a comprehensive ISP IP that includes many functionalities for image processing. It is optimized for high resolution and low light envir...
49
10.0
SAS Initiator, 12G, 4 Ports, 48 Gbps
The SAS Initiator Controller IP Core provides an interface to high-speed serial link replacement for the parallel SCSI attachment of mass storage devi...
50
10.0
MIPI CSI-2 Receiver for FPGA
MIPI CSI-2 Rx - IP core for FPGA which based on CSI-2 standard : Camera - Application Processor....