Design & Reuse
5454 IP
2151
0.0
TSMC CLN90LP 90nm Multi Phase DLL - 240MHz-1200MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
2152
0.0
TSMC CLN90LP 90nm Multi Phase DLL - 60MHz-300MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
2153
200.0
True Random Number Generator
The EIP-76 TRNG is an advanced hardware based, technology independent True Random Number Generator. Security is now a basic requirement for all device...
2154
10.0
True Random Number Generator for NIST SP 800-90c
The security strength of many systems and applications is dependent on the quality of random number generators. Many cryptographic operations require ...
2155
10.0
True Random Number Generators
The security strength of many systems and applications is dependent on the quality of random number generators. Many cryptographic operations require ...
2156
3.0
True Random and Pseudorandom Number Generator
The true random generator core implements true random number generation. The core passes the American NIST Special Publication 800-22 and Diehard Rand...
2157
51.0
True Random Number Generator (TRNG)
The TRNG IP core establishes a benchmark for hardware-based security in cryptographic systems, by generating high-entropy, true random numbers essenti...
2158
50.0
Securyzr Digital True Random Number Generator (TRNG) by Secure-IC, compliant with NIST SP800-90
Secure-IC offers both True Random Number Generator (TRNG) resilient to harmonic injection for statistically independent sets of bits generation and De...
2159
49.0
Secure-IC's Securyzr(TM) True Random Number Generator
The True Random Number Generator is an essential silicon-proven digital IP core for all FPGA, ASIC and SoC designs that targets cryptographically secu...
2160
0.118
General Purpose IO IP, True 3.3V, UMC 90nm SP process
UMC 90nm SP/RVT process true 3.3V standard IO Cell Library Using 3.3V GOX52 IO....
2161
0.118
UMC 0.11um HS/AL Logic Process True 3.3V Standard IO Cell Library
UMC 0.11um HS/AL Logic Process True 3.3V Standard IO Cell Library...
2162
0.118
UMC 0.18um Logic GII Process true 3.3V RTC IO cell Library
UMC 0.18um Logic GII Process true 3.3V RTC IO cell Library...
2163
0.118
UMC 0.5um LOGIC process Low Voltage Gate Array true 5.0V Oscillator IO cells
UMC 0.5um LOGIC process Low Voltage Gate Array true 5.0V Oscillator IO cells...
2164
0.118
UMC 28nm Logic and Mixed-Mode Low-K HPC Process True 1.8V High Frequency Oscillator BOAC IO Cell Library
UMC 28nm Logic and Mixed-Mode Low-K HPC Process True 1.8V High Frequency Oscillator BOAC IO Cell Library...
2165
0.118
UMC 28nm Logic and Mixed-Mode Low-K HPC Process True 1.8V Low Power Low Frequency OSC IO Cell Library
UMC 28nm Logic and Mixed-Mode Low-K HPC Process True 1.8V Low Power Low Frequency OSC IO Cell Library...
2166
0.118
UMC 55nm SP/RVT LowK Logic Process True 3.3V Generic IO Cell Library
UMC 55nm SP/RVT LowK Logic Process True 3.3V Generic IO Cell Library...
2167
0.118
UMC 55nm SP/RVT LowK Logic Process True 3.3V Low Frequency OSC IO Cell Library
UMC 55nm SP/RVT LowK Logic Process True 3.3V Low Frequency OSC IO Cell Library...
2168
0.118
UMC 90nm LL/RVT LowK process true 3.3V Analog ESD IO cell Library Using 3.3V GOX52 IO
UMC 90nm LL/RVT LowK process true 3.3V Analog ESD IO cell Library Using 3.3V GOX52 IO...
2169
0.118
UMC 90nm LL/RVT LowK process true 3.3V Analog ESD IO cell Library Using 3.3V GOX52 IO
UMC 90nm LL/RVT LowK process true 3.3V Analog ESD IO cell Library Using 3.3V GOX52 IO...
2170
0.118
UMC 90nm Logic/Mixed Mode SP(RVT) Low-K process;True 3.3V PECL IO Library.
UMC 90nm Logic/Mixed Mode SP(RVT) Low-K process;True 3.3V PECL IO Library....
2171
0.118
UMC 90nm SP/RVT Low-K process true 3.3V Analog ESD IO cell Library Using 3.3V GOX52 IO
UMC 90nm SP/RVT Low-K process true 3.3V Analog ESD IO cell Library Using 3.3V GOX52 IO...
2172
0.118
UMC 90nm SP/RVT process true 3.3V Analog ESD IO cell Library Using 3.3V GOX52 IO
UMC 90nm SP/RVT process true 3.3V Analog ESD IO cell Library Using 3.3V GOX52 IO...
2173
0.0
AISAFE KAUAI, True Random Number Generation Solutions Product Line
The Analogue Insight Safe Digital Noise Source is a high performance, low area, low power physical noise source with digitization suitable for use in ...
2174
0.0
True Random Number Generator IP Block
Crypto Quantique’s hardware primitives that supplement the Root of Trust include the Physical Unclonable Function (PUF) & True Random Number Generator...
2175
7.0
10 Bit 40 MS/s Pipeline ADC
The IP consists of a 10 bit 40 MS/s pipeline ADC. A time-interleaved architecture with 1.5 bit per stage is used. The operational amplifiers are share...
2176
7.0
12 Bit 17 kS/s Cyclic ADC
This cyclic ADC, based on redundant-signed-digit (RSD) conversion, is optimized for power efficiency and high accuracy. It provides 12 bit resolution ...
2177
7.0
12 Bit 20 MS/s Pipeline ADC
This pipelined ADC can be applied for up to 20MSps sampling frequencies. By using interleaved switched-capacitor circuitries a CLK signal with half ...
2178
7.0
12 Bit 40 MS/s Pipeline ADC
This pipelined ADC can be applied for up to 40MSps sampling rates with on-chip track&hold block or continuous signal sampling....
2179
7.0
12 Bit 54 kS/s Cyclic ADC
This cyclic ADC, based on redundant-signed-digit (RSD) conversion, is optimized for power efficiency and high accuracy. It provides 12 bit resolution ...
2180
7.0
12-Bit 1 MS/s DAC with voltage output
The IP consists of a 12 bit current steering DAC. The DAC is connected to a transimpedance amplifier(TIA) in order to provide a voltage output signal....
2181
7.0
15 Bit 192 kS/s Sigma-Delta ADC
The ADC IP is a general-purpose sigma-delta converter and it is configurable for conversion speed and power consumption with adaptable oversampling ra...
2182
7.0
15 Bit 8 kS/s Sigma-Delta ADC
The ADC IP is a general-purpose sigma-delta converter and it is configurable for conversion speed and power consumption with adaptable oversampling ra...
2183
7.0
16 Bit 10 kS/s Incremental Delta - Sigma ADC
On the one hand, incremental delta-sigma modulators are able to convert DC and multiplexed input signals as known from Nyquist ADCs. On the other hand...
2184
7.0
16 Bit 13 kS/s Cyclic ADC
This cyclic ADC, based on redundant-signed-digit (RSD) conversion, is optimized for power efficiency and high accuracy. It provides 16 bit resolution ...
2185
7.0
Ultra-Low Power 6 - 13 Bit 0.5 -10 kS/s 10μW Analog Front End
The Analog-Frontend (AFE) IP consists of programmable current and voltage preamplifier followed by a Successive Approximation Register (SAR) architect...
2186
7.0
Ultra-Low Power 6 - 13 Bit 1-10 kS/s 1.9 μW SAR ADC
The IP consists of a Successive Approximation Register (SAR) architecture ADC using charge-redistribution technique. The ADC IP is configurable regard...
2187
7.0
Ultra-low power RF receiver / WakeUp receiver
The integrated ultra-low power receiver technology RFicient® was developed for ISM frequency bands and built in standard CMOS technology. The receiver...
2188
7.0
USB 2.0 Full/Low-Speed Device Core
The FHG USB DEV is a scalable, high performance IP-Module for usage in ASIC- and FPGA-designs to integrate full-speed USB 2.0 device functionality wi...
2189
7.0
USB 2.0 Full/Low-Speed Embedded Host Controller
The FHG USB EHC is a scalable, high performance IP-Module for usage in ASIC- and FPGA-designs to integrate full-/low-speed USB 2.0 host functionality ...
2190
7.0
USB 2.0 High/Full-Speed Device Core
The FHG USB2 DEV is a scalable, high performance IP-Module for usage in ASIC- and FPGA-designs to integrate high-/full-speed USB 2.0 device functiona...
2191
7.0
USB 2.0 High/Full/Low-Speed Embedded Host Controller
The FHG USB2 EHC is a scalable, high performance IP-module for usage in ASIC and FPGA designs to integrate high/full/low-speed USB 2.0 host functiona...
2192
7.0
USB 2.0 OTG Full/Low-Speed Dual Role Core
The FHG USB OTGDRD is a scalable, high performance IP-Module for usage in ASIC- and FPGA-designs to integrate full-/low-speed USB 2.0 device and host ...
2193
7.0
USB 2.0 OTG High/Full/Low-Speed Dual Role Core
The FHG USB2 OTGDRD is a scalable, high performance IP-Module for usage in ASIC- and FPGA-designs to integrate high/full/low-speed USB 2.0 device and ...
2194
3.0
High Performance, Low Latency PCIe Gen5 PHY
Terminus Circuits offers best-in-class PHY IP for PCI Express Gen 5/4/3/2/1. The PHY is designed for low latency, low power, small form factor, high i...
2195
3.0
High Speed Low Jitter 16GHz Output LC PLL
Terminus Circuits offers an Analog Phase Locked Loop which is a LC oscillator-based integer-N PLL IP powered at 900 mV. The PLL operates with input re...
2196
3.0
Single Lane and Quad Lane 10Gbps USB3.1 PHY IP in GF 28SLP process
TERMINUS CIRCUITS USB 3.1 GEN2 PHY is high performance, low power, low latency Single & Quad-Lane PHY that supports USB protocol and its signalling ne...
2197
3.0
Single Lane and Quad Lane 10Gbps USB3.1 PHY IP in TSMC 28HPC process
TERMINUS CIRCUITS USB 3.1 GEN2 PHY is high performance, low power, low latency Single & Quad-Lane PHY that supports USB protocol and its signalling ne...
2198
3.0
Single Lane and Quad Lane 10Gbps USB3.1 PHY IP in TSMC 55LP process
TERMINUS CIRCUITS USB 3.1 GEN2 PHY is high performance, low power, low latency Single & Quad-Lane PHY that supports USB protocol and its signalling ne...
2199
3.0
Single Lane and Quad Lane 10Gbps USB3.1 PHY IP in TSMC 65GP process
TERMINUS CIRCUITS USB 3.1 GEN2 PHY is high performance, low power, low latency Single & Quad-Lane PHY that supports USB protocol and its signalling ne...
2200
3.0
Single Lane and Quad Lane 16Gbps PCIe4.0 PHY IP in TSMC 28HPC process
TERMINUS CIRCUITS PCIe GEN4.0 PHY is high performance, low power, low latency Single & Quad-Lane PCI Express PHY that supports PCI Express protocol an...