Design & Reuse
5418 IP
5401
0.0
Synopsys PCIe 4.0 PHY IP for TSMC N7
The multi-channel Synopsys PHY IP for PCI Express® 4.0 includes Synopsys’ high-speed, high-performance transceiver to meet today’s applications’ deman...
5402
0.0
Synopsys PCIe 5.0 PHY IP for SF5
The multi-channel Synopsys PHY IP for PCI Express® 4.0 includes Synopsys’ high-speed, high-performance transceiver to meet today’s applications’ deman...
5403
0.0
Synopsys PCIe 7.0 PHY IP for SF4X
The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 7.0 meets today’s demands for higher bandwidth and power efficiency across backplane, and c...
5404
0.0
Synopsys PCIe 7.0 PHY IP for TSMC N3P
The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 7.0 meets today’s demands for higher bandwidth and power efficiency across backplane, and c...
5405
0.0
Synopsys PUF Hardware Base IP
Device identities and cryptographic root keys are at the foundation of every security system. With the explosion of the IoT, new and scalable ways are...
5406
0.0
Synopsys PUF Hardware Premium with key wrap and certification support
Device identities and cryptographic root keys are at the foundation of every security system. With the explosion of the IoT, new and scalable ways are...
5407
0.0
Synopsys USB 3.1 PHY IP for TSMC N3A
The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum. The comprehensive USB 3.1 IP offerin...
5408
0.0
Synopsys USB-C 3.1/DP TX PHY for TSMC N4P
The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum. The comprehensive USB 3.1 IP offerin...
5409
0.0
Synopsys USB4 PHY IP for TSMC N4P
The Synopsys USB4 IP solution is based on the USB4 specification from the USB Implementer Forum (USB-IF). The USB4 IP offering includes device router,...
5410
0.0
Synopsys Verification IP for DDR4 (UDIMM, RDIMM, LDIMM)
Synopsys® VC VerificationIP for the JEDEC DDR4 memory protocol specification provides a comprehensive set of protocol, methodology, verification and p...
5411
0.0
Synopsys Verification IP for LPDDR2
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5412
0.0
Synopsys Verification IP for LPDDR2
Synopsys® VC Verification IP for the JEDEC LPDDR2 memory protocol specification provides a comprehensive set of protocol, methodology, verification an...
5413
0.0
Synopsys Verification IP for LPDDR3
Synopsys® VC VerificationIP for the JEDEC LPDDR3 memory protocol specification provides a comprehensive set of protocol, methodology, verification and...
5414
0.0
Synopsys Verification IP for LPDDR4
Synopsys® VC Verification IP for the JEDEC LPDDR4 memory protocol specification provides a comprehensive set of protocol, methodology, verification an...
5415
0.0
Synopsys Verification IP for UniPro
Synopsys® VC Verification IP for the MIPI Alliance UniPro protocol specification provides a comprehensive set of protocol, methodology, verification a...
5416
0.0
Synthesizable 3DIO IP for Flexible Physical Implementation
Synopsys 3DIO is a specialized IO for multi-die integration. It includes multiple IP offerings for system-on-chip (SoC) designers to implement tunable...
5417
0.0
System Level Solutions - ASIC/FPGA/SoC Design Services
SLS works with you to optimize our designs, keeping an eye on the bottom line. SLS products and services include: ASIC/FPGA/SoC Design Services Hi...
5418
0.0
System Level Solutions - High Speed PCB Design Services
SLS is a turnkey provider of a range of innovative PCB designs starting right from high-speed board designs, to multi-layered and multi CPU board desi...