3801 0.0

Bluetooth 5.x Low Energy (BLE) RF Transceiver Orca’s ultra-low power Bluetooth low energy RF transceiver and modem is a best-in-class Bluetooth 5 low energy design for battery-powered IoT and M2M ...

3802 0.0

SM3 Crypto Accelerator The EIP-52 SM3 Engine implements the SM3 hash algorithm. The accelerators include I/O registers, hash calculation cores, message padding logic, and da...

3803 0.0

SM4 Crypto Accelerator The EIP-12 SM4 Engine implements the SM4 cipher block algorithm. The accelerator includes I/O registers, encryption and decryption cores. Designed for...

3804 0.0

SM4-XTS Crypto Accelerator The EIP-312 – SM4-XTS Accelerator is specifically suited for next generation processors deployed in networking and storage appliances and SSD controll...

3805 0.0

DMA AXI4-Stream Interface to AXI Memory Map Address Space Digital Blocks DB-AXI4-STREAM-TO-AXI4-MM-BRIDGE Verilog RTL IP Core accepts AXI4-Stream data and control input, converts the control TID to a AXI4 Mem...

3806 0.0

HMAC Accelerator with SHA-3, SHA-2, SHA-1 The EIP-59 is the IP for accelerating the various single pass HMAC (FIPS-198-1) algorithms using secure hash integrity algorithms like MD5 (RFC1231),...

3807 0.0

CMAC and XCBC AES Core The CMAC1 core provides implementation of cryptographic hashes AES-CMAC per NIST SP 800-38B and AES-XCBC. The cores utilize “flow-through” design that...

3808 0.0

HMAC-SHA-2 (224/256/384/512) 100 Million Trace DPA Resistant Crypto Accelerato Rambus DPA Resistant HMAC-SHA-2 Cryptographic Accelerator Cores prevent against the leakage of secret cryptographic key material through attacks when ...

3809 0.0

Small and Fast Security Solutions for Critical Automotive Applications Today's vehicles are equipped with multiple microcontrollers that control critical safety and performance functions in a vehicle. When considering...

3810 0.0

AMBA AHB to APB Bus Bridge Core The AHB2APB implements an AHB to APB bus bridge, allowing the connection of peripherals with an APB interface to an AHB bus. The highly-configurable...

3811 0.0

AMBA AHB Verification IP AMBA AHB VIP can be configured as Master, Slave and AHB bus and allows Module & System level verification. AMBA AHB VIP is a readymade highly configur...

3812 0.0

AMBA AXI 4.0 Verification IP eInfochips’ AXI 4.0 Verification IP Product is the Industry’s most comprehensive protocol validation solution for predictable verification of AMBA AXI...

3813 0.0

Embedded Memories for GF (55nm, 40nm, 22nm) Synopsys provides the industry's broadest portfolio of silicon-proven foundation IP, including Memory Compilers, Logic Libraries and General Purpose I...

3814 0.0

Embedded Memories for Intel (16nm, 18A) Synopsys provides the industry's broadest portfolio of silicon-proven foundation IP, including Memory Compilers, Logic Libraries and General Purpose I...

3815 0.0

Embedded Memories for SMIC (65nm, 40nm) Synopsys provides the industry's broadest portfolio of silicon-proven foundation IP, including Memory Compilers, Logic Libraries and General Purpose I...

3816 0.0

Embedded Memories for TSMC (65nm, 40nm, 28nm, 22nm, 16nm, N7, N4, N3) Synopsys provides the industry's broadest portfolio of silicon-proven foundation IP, including Memory Compilers, Logic Libraries and General Purpose I...

3817 0.0

Embedded Memories for UMC (40nm, 28nm) Synopsys provides the industry's broadest portfolio of silicon-proven foundation IP, including Memory Compilers, Logic Libraries and General Purpose I...

3818 0.0

UMC L110AELL 110nm Clock Generator PLL - 120MHz-600MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

3819 0.0

UMC L110AELL 110nm Clock Generator PLL - 30MHz-150MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

3820 0.0

UMC L110AELL 110nm Clock Generator PLL - 60MHz-300MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

3821 0.0

UMC L110AELL 110nm DDR DLL - 24MHz-120MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

3822 0.0

UMC L110AELL 110nm DDR DLL - 32MHz-160MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

3823 0.0

UMC L110AELL 110nm Deskew PLL - 120MHz-600MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

3824 0.0

UMC L110AELL 110nm Deskew PLL - 30MHz-150MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

3825 0.0

UMC L110AELL 110nm Deskew PLL - 60MHz-300MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

3826 0.0

UMC L110AELL 110nm Spread Spectrum PLL - 120MHz-600MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

3827 0.0

UMC L110AELL 110nm Spread Spectrum PLL - 30MHz-150MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

3828 0.0

UMC L110AELL 110nm Spread Spectrum PLL - 60MHz-300MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

3829 0.0

UMC L110HS 110nm Clock Generator PLL - 160MHz-800MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

3830 0.0

UMC L110HS 110nm Clock Generator PLL - 320MHz-1600MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

3831 0.0

UMC L110HS 110nm Clock Generator PLL - 80MHz-400MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

3832 0.0

UMC L110HS 110nm DDR DLL - 104MHz-520MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

3833 0.0

UMC L110HS 110nm DDR DLL - 78MHz-390MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

3834 0.0

UMC L110HS 110nm Deskew PLL - 160MHz-800MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

3835 0.0

UMC L110HS 110nm Deskew PLL - 320MHz-1600MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

3836 0.0

UMC L110HS 110nm Deskew PLL - 80MHz-400MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

3837 0.0

UMC L110HS 110nm Spread Spectrum PLL - 160MHz-800MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

3838 0.0

UMC L110HS 110nm Spread Spectrum PLL - 320MHz-1600MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

3839 0.0

UMC L110HS 110nm Spread Spectrum PLL - 80MHz-400MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

3840 0.0

UMC L110LL 110nm Clock Generator PLL - 120MHz-600MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

3841 0.0

UMC L110LL 110nm Clock Generator PLL - 30MHz-150MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

3842 0.0

UMC L110LL 110nm Clock Generator PLL - 60MHz-300MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

3843 0.0

UMC L110LL 110nm DDR DLL - 24MHz-120MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

3844 0.0

UMC L110LL 110nm DDR DLL - 32MHz-160MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

3845 0.0

UMC L110LL 110nm Deskew PLL - 120MHz-600MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

3846 0.0

UMC L110LL 110nm Deskew PLL - 30MHz-150MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

3847 0.0

UMC L110LL 110nm Deskew PLL - 60MHz-300MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

3848 0.0

UMC L110LL 110nm Spread Spectrum PLL - 120MHz-600MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

3849 0.0

UMC L110LL 110nm Spread Spectrum PLL - 30MHz-150MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

3850 0.0

UMC L110LL 110nm Spread Spectrum PLL - 60MHz-300MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...