Design & Reuse
343 IP
1
200.0
Post-Quantum Cryptography - xQlave® PQC ML-KEM (Kyber)
In a world where advances in quantum computing threaten traditional cryptographic systems, Xiphera’s xQlave® ML-KEM (Kyber) Key Encapsulation Mechanis...
2
100.0
MACsec - Extreme-speed - Security Protocol
MACsec is a point-to-point protocol located on layer two (Data Link) of the OSI model. Xiphera's comprehensive MACsec solution portfolio safeguards th...
3
100.0
Post-Quantum Cryptography - nQrux® Secure Boot - Quantum-Secure Authenticated Boot (PQC)
nQrux® Secure Boot enhances system security by enabling quantum-secure authenticated boot, crucial for verifying the authenticity and integrity of bin...
4
100.0
Post-Quantum Cryptography - xQlave® PQC ML-DSA (Dilithium)
The xQlave® ML-DSA (Dilithium) Digital Signature Algorithm IP core secures critical infrastructures and operations against the threat of quantum compu...
5
51.0
TLS 1.3 - Security Protocol
Transport Layer Security (TLS) is a cryptographic protocol used for building a secure connection between a client and a server over the Internet. A ha...
6
51.0
True Random Number Generator (TRNG)
The TRNG IP core establishes a benchmark for hardware-based security in cryptographic systems, by generating high-entropy, true random numbers essenti...
7
50.0
AES - GCM - Extreme-speed variant
XIP1113E is a an extreme-speed IP core implementing the Advanced Encryption Standard (AES) in Galois Counter Mode (GCM). AES-GCM is a widely used cryp...
8
50.0
IPsec - Security Protocol
IPsec (Internet Protocol Security) is a widely implemented protocol to secure communications across the Internet. Xiphera’s IPsec core enhances secure...
9
48.0
nQrux® Crypto Module
Xiphera’s nQrux® Crypto Module IP core provides a comprehensive security platform that allows for customisation of top-notch cryptographic services, s...
10
43.0
Elliptic Curve Cryptography (ECC) Accelerator
The high-speed ECC Accelerator reaches to more than a thousand operations per second in a modern FPGA or ASIC. Furthermore, it covers all NIST P curve...
11
3.0
Pseudorandom Number Generator (PRNG) - Balanced variant
The PRNG IP core establishes a benchmark for hardware-based security in cryptographic systems by generating high-quality pseudorandom numbers. It deli...
12
3.0
Pseudorandom Number Generator (PRNG) - High-speed variant
The PRNG IP core establishes a benchmark for hardware-based security in cryptographic systems by generating high-quality pseudorandom numbers. It deli...
13
1.0
nQrux® Confidential Computing Engine (CCE)
nQrux® Confidential Computing Engine (CCE) offers customisable solutions protecting data, code execution, and AI (Artificial Intelligence) models in d...
14
0.0
MACsec - Balanced - Security Protocol
MACsec is a point-to-point protocol located on layer two (Data Link) of the OSI model. Xiphera's comprehensive MACsec solution portfolio safeguards th...
15
0.0
MACsec - High-speed - Security Protocol
MACsec is a point-to-point protocol located on layer two (Data Link) of the OSI model. Xiphera's comprehensive MACsec solution portfolio safeguards th...
16
0.0
Versatile AES
XIP1123B Versatile AES IP core ensures robust encryption and decryption, providing data confidentiality and integrity with the Advanced Encryption Sta...
17
0.0
AES - CTR
XIP1103H is a high-speed IP Core implementing the Advanced Encryption Standard (AES) in Counter Mode (CTR). The Counter mode of operation effectively ...
18
0.0
AES - GCM - Balanced variant
XIP1113B is a balanced IP core implementing the Advanced Encryption Standard (AES) in Galois Counter Mode (GCM). AES-GCM is a widely used cryptographi...
19
0.0
AES - GCM - High-speed variant
XIP1113H is a a high-speed IP core implementing the Advanced Encryption Standard (AES) in Galois Counter Mode (GCM). AES-GCM is a widely used cryptogr...
20
0.0
AES - XTS - Balanced variant
XIP1183B is a balanced IP core implementing the Advanced Encryption Standard (AES) with 256-bit key in XTS mode. AES-XTS is block-oriented cipher for...
21
0.0
AES - XTS - High-speed variant
XIP1183H is a high-speed IP core implementing the Advanced Encryption Standard (AES) with 256-bit key in XTS mode. AES-XTS is block-oriented cipher f...
22
0.0
SHA-2 Hash Function (SHA-256) - Balanced variant
The SHA-2 IP from Xiphera is a versatile Intellectual Property (IP) core designed for SHA-256 cryptographic hash function with extended support for HM...
23
0.0
SHA-2 Hash Function (SHA-256/512) - Compact variant
The SHA-2 IP from Xiphera is a versatile Intellectual Property (IP) core designed for SHA-256 and SHA-512 cryptographic hash functions with extended s...
24
0.0
SHA-2 Hash Function (SHA-384) - Balanced variant
The SHA-2 IP from Xiphera is a versatile Intellectual Property (IP) core designed for SHA-384 cryptographic hash function with extended support for HM...
25
0.0
SHA-2 Hash Function (SHA-512) - Balanced variant
The SHA-2 IP from Xiphera is a versatile Intellectual Property (IP) core designed for SHA-512 cryptographic hash function with extended support for HM...
26
0.0
SHA-3 Hash Function - Compact variant
This IP core support SHA3-224, SHA3-256, SHA3-384, SHA3-512, and related functions such as SHAKE, cSHAKE, KMAC,TupleHash, and ParallelHash. Xiphera's...
27
0.0
SHA-3 Hash Function - High-speed variant
This IP core support SHA3-224, SHA3-256, SHA3-384, SHA3-512, and related functions such as SHAKE, cSHAKE, KMAC,TupleHash, and ParallelHash. Xiphera's...
28
0.0
ChaCha20-Poly1305 - Balanced variant
Xiphera's ChaCha20-Poly1305 symmetric encryption IP cores provide robust security for a wide range of applications. It combines the high-speed ChaCha2...
29
0.0
ChaCha20-Poly1305 - High-speed variant
Xiphera's ChaCha20-Poly1305 symmetric encryption IP cores provide robust security for a wide range of applications. It combines the high-speed ChaCha2...
30
0.0
Xiphera Hardware Security IP Solutions - Complete IP Overview
We protect your critical systems by designing security directly into hardware. At Xiphera, we specialise in designing cutting-edge, hardware-based s...
31
0.0
NIST P-224/P-256/P-384/P521 ECDH and ECDSA
The NIST P-224/P-256/P-384/P-521 ECDH and ECDSA can be used for elliptic curve key generation, computation of Diffie-Hellman shared secrets as well as...
32
0.0
nQrux - Hardware Trust Engines
Xiphera's nQrux™ family of Hardware Trust Engines offers ready-to-implement security modules for various security architectures. The nQrux&t...
33
0.0
RSA Signature Verification
The RSA Signature Verification from Xiphera is a very compact Intellectual Property (IP) core designed for RSA (Rivest-Shamir-Adleman) signature verif...
34
0.0
Ascon
Xiphera's Ascon symmetric encryption IP cores provide robust security for a wide range of applications. It is, as a lightweight encryption algorithm, ...
35
0.0
Standalone IPsec
IPsec (Internet Protocol Security) is a widely implemented protocol to secure communications across the Internet. Xiphera’s IPsec IP core enhances sec...
36
0.0
Curve25519 Key Exchange
The Curve25519 Key Exchange from Xiphera is a very compact Intellectual Property (IP) core designed for efficient key exchange using the X25519 protoc...
37
0.0
Curve25519 Key Exchange & Digital Signatures
The Curve25519 Key Exchange & Digital Signatures from Xiphera is a very compact Intellectual Property (IP) core designed for efficient X25519 key exch...
38
130.0
LPDDR6, LPDDR5X Combo PHY & Controller
INNOSILICON™ introduces its LPDDR6/5X PHY and Controller IP, purpose-built for the AI era’s high-performance chip design needs. This solution is fully...
39
105.0
CME IoT platform
Sensor-Mate (sensing node)Long distance wireless communication (920MHz)Sensor-Gateway (Aggregator)920MHz wireless module (CM Engineering proprietary)G...
40
100.0
PCIe 5.0 PHY & Controller
The Innosilicon Gen1/2/3/4/5 PCI Express Controller provides a PCI Express Root Complex (RC) and Endpoint (EP) application. It’s a high performance, h...
41
100.0
LPDDR5X, LPDDR5, LPDDR4X, LPDDR4 Combo PHY & Controller
The INNOSILICON™ LPDDR IP includes a LPDDR5X/5/4X/4 Combo PHY and controller. It is fully compliant with the JEDEC standard. Optimized for low-power a...
42
80.0
GDDR7 PHY & Controller
The INNOSILICON™ GDDR7 PHY is fully compliant with the JEDEC GDDR7 standard, supporting data rates of up to 32 Gbps in PAM3 mode. In PAM3 mode, each b...
43
60.0
UCIe Chiplet PHY & Controller
INNOSILICON™ UCIe Chiplet IP offers a customizable solution for seamless, low-latency data transfer between silicon dies and chips, enabling heterogen...
44
50.0
MAXVY Technologies
MAXVY is a fast growing fabless semiconductor company which is currently engaged in the fields of RTL design and Verification IP Solutions. We offe...
45
25.0
HBM4, HBM3E PHY & Controller
INNOSILICON™ HBM4/3E IP is fully compliant with the JEDEC standard for HBM3E and the preliminary specification for HBM4. The IP includes a customizabl...
46
25.0
DDR5, DDR4 Combo PHY & Controller
The INNOSILICON DDR IPTM Mixed-Signal DDR5/4 Combo PHY s provide turnkey physical interface solutions for ICs requiring access to JEDEC compatible SDR...
47
15.0
GDDR6X, GDDR6 Combo PHY & Controller
The INNOSILICON™ GDDR6X/6 PHY is fully compliant with the JEDEC GDDR6X/6 standard, supporting data rates of up to 20 Gbps per pin for PAM2 GDDR6 mode ...
48
10.0
MIPI DSI-2 Transmitter Interface IP
MIPI DSI-2 (Display Serial Interface) defines an interface between a peripheral device (camera) and host processor (application engine) for mobile dev...
49
8.0
MIPI I3C Verification IP with IBI feature enabled
The Maxvy's MIPI-I3C VIP provides configurable option to select I3C master/secondary master/slave based on the MIPI I3C DUT function as per user speci...
50
8.0
Universal Chiplet Interconnect Express (UCIe) Verification IP
MAXVY UCIe VIP , a state-of-the-art solution that offers a comprehensive set of features and capabilities to ensure the quality and performance of you...