Design & Reuse
598 IP
351
0.0
40G Ultralink D2D PHY for TSMC N6, N7
Proprietary chiplet interconnect solution with high-performance, high-bandwidth, and long reach die-to-die link connectivity The Cadence® UltraLink™ ...
352
0.0
112G-ULR PAM4 SerDes PHY for Samsung SF5A
112G-ULR Serdes PAM4 PHY Enables reliable high-speed data transfer over backplane, DAC, chip-to-chip, and chip-to-module channel The Cadence 112Gbps ...
353
0.0
112G-ULR PAM4 SerDes PHY for TSMC N3E/N3P
112G-ULR Serdes PAM4 PHY Enables reliable high-speed data transfer over backplane, DAC, chip-to-chip, and chip-to-module channel The Cadence 112Gbps ...
354
0.0
112G-ULR PAM4 SerDes PHY for TSMC N5/N4P
112G-ULR Serdes PAM4 PHY Enables reliable high-speed data transfer over backplane, DAC, chip-to-chip, and chip-to-module channel The Cadence 112Gbps ...
355
0.0
112G-ULR PAM4 SerDes PHY for TSMC N6/N7
112G-ULR Serdes PAM4 PHY Enables reliable high-speed data transfer over backplane, DAC, chip-to-chip, and chip-to-module channel The Cadence 112Gbps ...
356
0.0
112G-VSR for TSMC N3E/N3P
112G-VSR Serdes PAM4 PHY Enables reliable high-speed data transfer over backplane, DAC, chip-to-chip, and chip-to-module channel The Cadence 112Gbps ...
357
0.0
32-bit RISC CPU for low power aplications
VinRZ5110 is a low power, high performance 32-bit processor solution targeting embedded applications where low power and system cost are of utmost imp...
358
0.0
224G-LR SerDes PHY for TSMC N3E/N3P
224G-LR SerDes PHY enables 1.6T and 800G networks The Cadence 224G SerDes PHY for UALink enables the emerging 1.6T and 800G scale-up networks for hyp...
359
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224G-LR SerDes PHY for UALink for Intel 18A
224G-LR SerDes PHY enables 1.6T and 800G networks for UALink The Cadence 224G SerDes PHY for UALink enables the emerging 1.6T and 800G scale-up net...
360
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224G-LR SerDes PHY for UALink for TSMC N3E/N3P
224G-LR SerDes PHY enables 1.6T and 800G networks for UALink The Cadence 224G SerDes PHY for UALink enables the emerging 1.6T and 800G scale-up netwo...
361
0.0
I2C Host / Device Bus Controller
The synchronous I2C interface is a block that interconnects an APB bus. The APB - I2C Bridge interfaces to the APB bus on the system side and the I2C ...
362
0.0
32G LR Multi-Protocol SerDes (MPS) PHY
Designed to meet the power efficiency and performance requirements of next-generation, high-speed wireline and wireless 5G infrastructure The 32G MPS...
363
0.0
32G UCIe Standard PHY for TSMC N3P
UCIe enables chiplet industry standard interoperability combined with ultra-low latency, extreme power efficiency, and high performance The Cadence® ...
364
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I2S Controller IP Core- Two Channel
The Arasan I2S Controller IP Core is a two-channel I2S serial audio controller compliant to the Philips* Inter-IC Sound specification. The I2S bus is ...
365
0.0
I3C HDK
The I3C Total IP in a box HDK gives I3C SoC developers all the resources they need to implement MIPI I3C specifications right out of the box. The HDK...
366
0.0
I3C Prototyping Kit (HDK) Total IP in a Box
The I3C Total IP in a box HDK gives I3C SoC developers all the resources they need to implement MIPI I3C specifications right out of the box. The HDK...
367
0.0
16G Ethernet SerDes PHY
Optimized for power and area, our line-up of SerDes PHYs, deliver maximum performance and flexibility for today's most challenging applications The 1...
368
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16G Multi-Protocol SerDes (MPS) PHY
Optimized for power and area, our line-up of SerDes PHYs, deliver maximum performance and flexibility for today's most challenging applications The 1...
369
0.0
16G UCIe Advanced PHY for TSMC N3P
UCIe enables chiplet industry standard interoperability combined with ultra-low latency, extreme power efficiency, and high performance The Cadence® ...
370
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16G UCIe Advanced PHY for TSMC N4P/N5P
UCIe enables chiplet industry standard interoperability combined with ultra-low latency, extreme power efficiency, and high performance The Cadence® ...
371
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16G UCIe Standard PHY for Samsung SF5A
UCIe enables chiplet industry standard interoperability combined with ultra-low latency, extreme power efficiency, and high performance The Cadence® ...
372
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16G UCIe Standard PHY for TSMC N3A Automotive
UCIe enables chiplet industry standard interoperability combined with ultra-low latency, extreme power efficiency, and high performance The Cadence® ...
373
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16G UCIe Standard PHY for TSMC N4P
UCIe enables chiplet industry standard interoperability combined with ultra-low latency, extreme power efficiency, and high performance The Cadence® ...
374
0.0
16G UCIe Standard PHY for TSMC N5A Automotive
UCIe enables chiplet industry standard interoperability combined with ultra-low latency, extreme power efficiency, and high performance The Cadence® ...
375
0.0
16G UCIe Standard PHY for TSMC N7
UCIe enables chiplet industry standard interoperability combined with ultra-low latency, extreme power efficiency, and high performance The Cadence® ...
376
0.0
56G-LR Pam4 SerDes for TSMC N6/N7
56G LR SerDes PHY provides exceptional performance w/ best-in-class power & area, making it ideal for machine learning and 5G The Cadence 56Gbps Long...
377
0.0
28G LR Multi-Protocol SerDes (MPS) PHY
Optimized for power and area, our line-up of SerDes PHYs, deliver maximum performance and flexibility for today's most challenging applications The 2...
378
0.0
DAB Receiver Kit
The DAB Receiver Kit from Fraunhofer IIS is a fully validated DAB/DAB+/T-DMB solution for the automotive and consumer market. This innovative software...
379
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Radar Co-Processor for Advanced Driver Assistance Systems (ADAS)
The EnSilica eSi-ADAS™ radar co-processor provides a small, highly efficient and low-power solution to enhance the overall performance and capab...
380
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Camera capture unit for multi-camera systems
The SEERIS Graphics Engine is a building block concept combining a collection of 2D graphics processing units with focus on blit operations, display c...
381
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CAN 2.0B Bus Controller IP Core
The Controller Area Network (CAN) controller IP that implements the CAN2.0A, CAN2.0B as well as newer high performance Non ISO CAN-FD protocols. It ca...
382
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CAN FD Bus Controller
CAN FD Bus Controller IP is an extension of Classical CAN Bus IP that addresses the increasing need for higher data rates and larger payload sizes. It...
383
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CAN FD Light Bus Controller
Arasan’s Controller Area Network – Flexible Data-Light (CAN-FD Light) Controller IP implements the CAN FD-Light (CIA 604-1) protocol. It can be integr...
384
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CAN-SEC Acceleration Engine
Arasan’s CAN-SEC Acceleration Engine Core implements the CAN-XL Protocol (CiA 610-1), CAN-XL Addon Part 1-Simple/Extercontent Indication (CiA 613-1), ...
385
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CAN-XL
Arasan's most advanced CAN-XL Controller Core performs serial communication as per CAN 2.0, CAN-FD & CAN-XL Specifications. It also supports origi...
386
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CAN-XL Controller
Arasan’s most advanced CAN-XL Controller Core performs serial communication as per CAN 2.0, CAN-FD & CAN-XL Specifications. It also supports original ...
387
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Fast Ethernet 10/100 802.3 MAC with IEEE 1588 PTP Support
The Arasan 10/100 Ethernet Media Access Controller with IEEE 1588 support IP core is compliant to the Ethernet/IEEE 802.3-2008 standard. It also inclu...
388
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Fast Ethernet 802.3 Media Access Controller (MAC)
The Arasan 10/100 Ethernet Media Access Controller with AHB Interface IP core is compliant to the Ethernet/IEEE 802.3-2008 standard. The 10/100 Ethern...
389
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PCI Express (PCIe) 6.0 Controller
Application-optimized, high-performance controller IP for PCIe The Cadence® Controller IP for PCIe 6.0 provides the logic required to integrate a roo...
390
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PCI Express (PCIe) 7.0 Controller
Application-optimized, high-performance controller IP for PCIe The Cadence® Controller IP for PCIe 7.0 provides the logic required to integrate a roo...
391
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PCIe 4/3/2 SerDes PHY
Optimized for power and area, our line-up of SerDes PHYs, deliver maximum performance and flexibility for today's most challenging applications The 1...
392
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ACS-AIP-DPHY-40GF-Auto - MIPI D-PHY in GlobalFoundries 40nm Automotive Process
Arasan delivers you a MIPI D-PHY in the process node and lane configuration you need, conforming to your specific design constraints, with a complete ...
393
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ACS-AIP-DPHY-40LP-RA - MIPI D-PHY TSMC 40LP Renesas- Automotive Grade
Arasan delivers you a MIPI D-PHY in the process node and lane configuration you need, conforming to your specific design constraints, with a complete ...
394
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GDDR6 Memory PHY for TSMC N5P
Designed for high performance and low latency in AI/ML, graphics and networking The latest, the Denali PHY IP for GDDR6, is comprised of architectura...
395
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GDDR6 Memory PHY for TSMC N7
Designed for high performance and low latency in AI/ML, graphics and networking The latest, the Denali PHY IP for GDDR6, is comprised of architectura...
396
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GDDR6 PHY for TSMC N6
High-performance IP for graphics, AI/ML, and automotive products The latest, the Denali PHY IP for GDDR6, is comprised of architectural improvements ...
397
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GDDR7 Memory PHY for TSMC N3P
High performance for graphics, AI, and automotive products The Cadence IP solution for GDDR7 consists of high-performance hardened PHY, serving hig...
398
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GDDR7 Memory PHY for TSMC N4P
High performance for graphics, AI, and automotive products The Cadence IP solution for GDDR7 consists of high-performance hardened PHY, serving high-...
399
0.0
GDDR7 Memory PHY for TSMC N5P
High performance for graphics, AI, and automotive products The Cadence IP solution for GDDR7 consists of high-performance hardened PHY, serving high-...
400
0.0
DDR3 PHY
Designed for server, networking, computing and consumer applications, our DDR4 multi-modal memory PHY is optimized for performance The DDR4 multi-m...