Design & Reuse
8404 IP
7301
0.0
LPDDR5X/5/4X PHY IP in SF5A for Automotive
The Synopsys LPDDR5X/5/4X PHY is Synopsys’ physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and system-inpackage ap...
7302
0.0
LPDDR5X/5/4X PHY IP on TSMC N3P
The Synopsys LPDDR5X/5/4X PHY is Synopsys’ physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and system- in- package...
7303
0.0
LPDDR5X/5/4X PHY on TSMC N5A for Automotive
The Synopsys LPDDR5X/5/4X PHY is Synopsys’ physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and system-inpackage ap...
7304
0.0
LPDDR6/5X/5 PHY in TSMC (N3P, N2P)
The Synopsys LPDDR6/5X/5 PHY IP enables ASICs, ASSPs, system-on-chips (SoCs), and system-in-package applications requiring high-performance LPDDR6, LP...
7305
0.0
LPDDR6/5X/5 PHY V2 in Samsung (SF2P)
The Synopsys LPDDR6/5X/5 PHY IP enables ASICs, ASSPs, system-on-chips (SoCs), and system-in-package applications requiring high-performance LPDDR6, LP...
7306
0.0
LPDDR6/5X/5 PHY V2 in TSMC (N5A, N3A) for Automotive
The Synopsys LPDDR6/5X/5 PHY IP enables ASICs, ASSPs, system-on-chips (SoCs), and system-in-package applications requiring high-performance LPDDR6, LP...
7307
0.0
LPDDR6/5X/5 PHY V2 in TSMC (N6, N5, N4P, N4C, N3P, N2P)
The Synopsys LPDDR6/5X/5 PHY IP enables ASICs, ASSPs, system-on-chips (SoCs), and system-in-package applications requiring high-performance LPDDR6, LP...
7308
0.0
MPEG Transport Stream Multiplexing & Encapsulation Engine
The MTS-E core multiplexes and encapsulates audio, video and metadata streams in a single MPEG Transport Stream (TS), and optionally encapsulates the ...
7309
0.0
SPI Master / Slave Controller w/FIFO (AHB & AHB-Lite Bus)
The Digital Blocks DB-SPI-MS is a Serial Port Interface (SPI) Controller Verilog IP Core supporting both Master/Slave SPI Bus transfers. The DB-SPI-MS...
7310
0.0
SPI Master / Slave Controller w/FIFO (AXI & AXI-Lite Bus)
The Digital Blocks DB-SPI-MS is a Serial Port Interface (SPI) Controller Verilog IP Core supporting both Master/Slave SPI Bus transfers. The DB-SPI-MS...
7311
0.0
SPI Master Controller w/FIFO (AHB & AHB-Lite Bus)
The Digital Blocks DB-SPI-M is a Serial Port Interface (SPI) Controller Verilog IP Core supporting only Master SPI Bus transfers (both Full Duplex and...
7312
0.0
SPI Master Controller w/FIFO (APB Bus)
The Digital Blocks DB-SPI-M is a Serial Port Interface (SPI) Controller Verilog IP Core supporting only Master SPI Bus transfers (both Full Duplex and...
7313
0.0
SPI to AHB Lite Bridge
The ISPI Slave to AHB Lite Master is commonly used as a monitor interface to allow external devices to access the internal AHB bus. A SPI Slave to ...
7314
0.0
SPI to AXI Bridge
The AHB Lite to AXI Bridge translates an AHB Lite bus transaction (read or write) to an AXI bus transaction. It is expected that the AXI clock and th...
7315
0.0
SPI-3 Link Layer eVerification Component
...
7316
0.0
SPI-3 PHY Layer eVerification Component
...
7317
0.0
Spread Spectrum PLL
The MXL-PLL-SS-R is a high performance PLL based Spread Spectrum Clock Generator implemented using a digital CMOS technology. It is highly integrated...
7318
0.0
IPsec Security Processor
Core implements the IPsec and SSL/TLS security standard at high data rates that require the cryptographic processing acceleration. The ISP1-128 core i...
7319
0.0
IPsec Security Processor
Core implements the IPsec and SSL/TLS security standard at high data rates that require the cryptographic processing acceleration. The ISP1-128 core i...
7320
0.0
IPsec software toolkit
The Rambus IPsec Toolkit (previously QuickSec from Inside Secure) is client/server software for cloud and embedded security. It provides a complete so...
7321
0.0
IPT 64GT/S UCIE-A PHY
The UCIe-A_HS 64Gbps Die-to-Die (D2D) PHY IP is a cutting-edge solution designed to meet the growing demand for ultra-high-speed interconnects between...
7322
0.0
IPT 64GT/S UCIE-S PHY,
The high-speed UCIe-S 64G is a cutting-edge standard package die-to-die (D2D) and chiplet-to-chiplet (C2C) interface IP solution designed to enable ul...
7323
0.0
IPT D2D CONTROLLER
The InPsytech high-speed D2D Controller IP, optimized for power and latency enables die-to-die or chiplet-to-chiplet connectivity in applications like...
7324
0.0
IPT LOW POWER UCIE-A PHY
The Ultra-low power UCIe-A Die-to-Die PHY IP is a cutting-edge solution designed to meet the growing demand for ultra-low-power system demand with up...
7325
0.0
IPT OPTIMIZED STD CELL
InPsytech comprehensive foundation IP portfolio offers a complete standard cell (STD) solution suitable for a broad range of system-on-chip (SoC) desi...
7326
0.0
IPT UCIE-S PHY
The IPT UCIe-S is a cutting-edge standard package die-to-die (D2D) and chiplet-to-chiplet (C2C) interface IP solution designed to enable high-speed an...
7327
0.0
GPU, 2D Composition engine for Android
The DMP ant100 is ultra tiny 2D composition engine which is the fastest 2D and pixel processing pipeline up to 8K x 8K resolution. The DMP ant100 can ...
7328
0.0
Fractional N-PLL
The MXL-PLL-FRAC is a high performance Fractional-N PLL implemented using a digital CMOS technology. It is highly integrated and requires no external ...
7329
0.0
Arasan Chip Systems - SoC Design Services
Arasan Chip Systems is a leading provider of Total IP solutions for mobile storage and connectivity applications. Arasan’s high-quality, silicon-pr...
7330
0.0
ARC NPX6 NPU IP Processor: AI Data Compression Option (OCP-MX)
The Synopsys ARC® NPX6 NPU IP Processor’s AI data compression option offers advanced data conversion and compression capabilities to enhance the eff...
7331
0.0
ARC Processors for Audio
The DSP-enhanced Synopsys ARC® EMxD and HS4xD Families of embedded 32-bit processors are based on the scalable ARCv2DSP Instruction Set Architecture (...
7332
0.0
ARC4 core
ES1020 core fully implements the ARC4 stream ciphering algorithm in hardware. For each input character, an output character is nerated. ES1020 ARC4 co...
7333
0.0
ARC4 Crypto Accelerator
The EIP-44 is the IP for accelerating the ARC4 stream cipher algorithm (used for legacy SSL & IPsec). Designed for fast integration, low gate count a...
7334
0.0
Archband Labs - SoC Design Services
From concept to volume production, Archband&rsquos; engineering team is here ready to assist you in defining your product specifications, realizing yo...
7335
0.0
Green Mountain Semiconductor - Design services
Green Mountain Semiconductor Inc. founded in 2014, began with a bold but simple vision which was to utilize the ingenuity, unique expertise and an abu...
7336
0.0
Frequency Synthesizer PLL
The MXL-PLL-SYN is a high performance PLL based frequency synthesizer implemented using a digital CMOS technology. It is highly integrated and require...
7337
0.0
ARIA Crypto Accelerator
The EIP-11 ARIA algorithm, as specified in RFC 5794. The accelerators include I/O registers, encryption and decryption cores, and the logic for feedba...
7338
0.0
Trilinear Technologies, Inc.- SoC Design Services
Trilinear Technologies comprehensive technical support includes software and systems integration support. Custom IP DevelopmentTrilinear Technologi...
7339
0.0
Processor Core
The MD5 encryption IP core is a fully compliant hardware implementation of the Message Digest Algorithm MD5, suitable for a variety of applications. ...
7340
0.0
Programmable Interrupt Controller
The Digital Blocks DB8259A Programmable Interrupt Controller core is a full function equivalent to the Intel 8259A and Harris / Intersil 82C59A device...
7341
0.0
Programmable Interrupt Controller
This interrupt controller can be used to bundle several different interrupt sources into one main system interrupt. The interrupt controller provides ...
7342
0.0
Programmable Interrupt Controller (Synchronous)
The Digital Blocks DB8259S Programmable Interrupt Controller IP core is a full function equivalent to the Intel Intel 8259A / Intersil 82C59A / NEC uP...
7343
0.0
Programmable Keyboard / Display Interface
The Digital Blocks DB8279 Programmable Keyboard / Display Interface core is a full function equivalent to the Intel 8279 / Mitsubishi 8279 / NEC uPD82...
7344
0.0
Programmable Mode AES Encrypt/Decrypt Core
The AES-P encryption IP core implements Rijndael encoding and decoding in compliance with the NIST Advanced Encryption Standard. It processes 128-bit ...
7345
0.0
Programmable Peripheral Interface
The Digital Blocks DB8255A Programmable Peripheral Interface IP core is a full function equivalent to the Intel 8255A / 82C55A and Harris / Intersil 8...
7346
0.0
Ironwood KAP (TM) Fast, Future-Proof Key Agreement Protocol Designed for Low-Resource Devices
Key agreement protocols are at the foundation of many of today's security applications. Veridify's Ironwood KAP™ is a future-proof, Diff...
7347
0.0
tRoot F004 G Hardware Secure Module (w/ ARC EM4, SEMC, PKA, SPAcc)
Synopsys tRoot™ Hardware Secure Modules (HSMs) with Root of Trust enable connected devices to securely and uniquely identify and authenticate themselv...
7348
0.0
tRoot F110 G Hardware Secure Module
Synopsys tRoot™ Hardware Secure Modules (HSMs) with Root of Trust enable connected devices to securely and uniquely identify and authenticate themselv...
7349
0.0
tRoot V023 FS Hardware Secure Module, ASIL-B compliant (w/ ARC EM22FS)
The ASIL B compliant DesignWare® tRoot™ Hardware Secure Module (HSM) for Automotive augments its comprehensive root of trust security solution with a ...
7350
0.0
Protocol and Memory aware Debug
With today's complex protocols and memory, debug has become one of the most difficult and time-consuming aspects of functional verification. Verdi Pro...