Design & Reuse
8402 IP
1301
0.118
12bit 1MSPS SAR ADC with 8-1 Mux (All C-type) ; UMC 0.13um LL/RVT FSG Logic Process
12bit 1MSPS SAR ADC with 8-1 Mux (All C-type) ; UMC 0.13um LL/RVT FSG Logic Process...
1302
0.118
12Bit 1Msps SAR-ADC based on UMC 55nm uLP eflash process (GPIO Function integrated)
12Bit 1Msps SAR-ADC based on UMC 55nm uLP eflash process (GPIO Function integrated)...
1303
0.118
12Bit 1Msps SAR-ADC based on UMC 55nm uLP process
12Bit 1Msps SAR-ADC based on UMC 55nm uLP process...
1304
0.118
12bits 1MHz Voltage output R-2R D/A Converter; UMC 55nm SP-RVT process
12bits 1MHz Voltage output R-2R D/A Converter; UMC 55nm SP-RVT process...
1305
0.118
24-bit digital signal processor soft core.
24-bit digital signal processor soft core....
1306
0.118
24bit 96KHz A/D converter, 1.8V 3-channel Sigma-Delta Audio ADC; HJTC 0.18um eFlash process
24bit 96KHz A/D converter, 1.8V 3-channel Sigma-Delta Audio ADC; HJTC 0.18um eFlash process...
1307
0.118
55 SP Dual Port SRAM compiler with 1P4M metal option
55 SP Dual Port SRAM compiler with 1P4M metal option...
1308
0.118
55nm eFlash Dual-Port SRAM memory compiler with row redundancy
55nm eFlash Dual-Port SRAM memory compiler with row redundancy...
1309
0.118
55nm-SP, FPD-Link Receiver, 3.3V/1.0V, 4 data plus 1 clock channel, 16~85MHz, DLL type,
55nm-SP, FPD-Link Receiver, 3.3V/1.0V, 4 data plus 1 clock channel, 16~85MHz, DLL type,...
1310
0.118
55ULP-SST 1P-RF with forward biased and HVT periphery
55ULP-SST 1P-RF with forward biased and HVT periphery...
1311
0.118
55ULP-SST 1P-RF with forward biased and UHVT periphery
55ULP-SST 1P-RF with forward biased and UHVT periphery...
1312
0.118
16-bit digital signal processor soft core.
16-bit digital signal processor soft core....
1313
0.118
16-bit digital signal processor soft core._x005F_x005F_x005F_x005F_x005F_x000D_
16-bit digital signal processor soft core....
1314
0.118
16Gbps multi-protocol programmable SerDes PHY in UMC 28HPC+
Faraday 16Gbps multi-protocol programmable SerDes PHY IP in UMC 28HPC+ process is designed with a system-level approach to provide optimization of pow...
1315
0.118
28Gb/s 4 lane high-speed SerDes; UMC 28nm HPC Logic Std/HS process
28Gb/s 4 lane high-speed SerDes; UMC 28nm HPC Logic Std/HS process...
1316
0.118
28nm HPC USB3.1 gen2 PHY(10Gbps)
28nm HPC USB3.1 gen2 PHY(10Gbps)...
1317
0.118
28nm HPC x4 lane 10 Gbps SERDES
28nm HPC x4 lane 10 Gbps SERDES...
1318
0.118
28nm HPC+ USB3.1 gen2 PHY(10Gbps)
28nm HPC+ USB3.1 gen2 PHY(10Gbps)...
1319
0.118
28nm HPC, LVDS RXIO, 500Mbps, 1.8V/0.9V
28nm HPC, LVDS RXIO, 500Mbps, 1.8V/0.9V...
1320
0.118
28nm HPM 1PRF with peri -LVT
28nm HPM 1PRF with peri -LVT...
1321
0.118
28nm HPM SH with Row redundancy
28nm HPM SH with Row redundancy...
1322
0.118
28nm HPM SP-SRAM with 1 column redundancy
28nm HPM SP-SRAM with 1 column redundancy...
1323
0.118
28nm HPM SP-SRAM with 2 column redundancy
28nm HPM SP-SRAM with 2 column redundancy...
1324
0.118
28nm HPM SP-SRAM with peri LVT
28nm HPM SP-SRAM with peri LVT...
1325
0.118
28nm HPM SP-SRAM with peri LVT & 2 column repair
28nm HPM SP-SRAM with peri LVT & 2 column repair...
1326
0.118
28nm HPM SP-SRAM with peri LVT & row & 1 column repair
28nm HPM SP-SRAM with peri LVT & row & 1 column repair...
1327
0.118
28nm HPM SP-SRAM with peri LVT row repair
28nm HPM SP-SRAM with peri LVT row repair...
1328
0.118
28nm HPM SP-SRAM with peri-LVT 1 column repair
28nm HPM SP-SRAM with peri-LVT 1 column repair...
1329
0.118
28nm HPM SP-SRAM with row and 1 column repair
28nm HPM SP-SRAM with row and 1 column repair...
1330
0.118
28nm HPM SP-SRAM with Row and 2 Column Repair
28nm HPM SP-SRAM with Row and 2 Column Repair...
1331
0.118
28nm Logic and Mixed-Mode HLP/RVT Process Multi-Voltage BOAC I/O Cell library
28nm Logic and Mixed-Mode HLP/RVT Process Multi-Voltage BOAC I/O Cell library...
1332
0.118
28nm Logic and Mixed-Mode HPC/RVT Process Multi-Voltage BOAC I/O Cell library
28nm Logic and Mixed-Mode HPC/RVT Process Multi-Voltage BOAC I/O Cell library...
1333
0.118
1:2 DDR2/DDR1/MDDR combo PHY; UMC 0.11um HS/Cu Logic Process
1:2 DDR2/DDR1/MDDR combo PHY; UMC 0.11um HS/Cu Logic Process...
1334
0.118
1:2 DDR2/DDR1/MDDR combo PHY; UMC 0.11um HS/Cu Logic Process
1:2 DDR2/DDR1/MDDR combo PHY; UMC 0.11um HS/Cu Logic Process...
1335
0.118
Band Gap IP, Input: 0.945V - 1.155V, VBG=0.8V, UMC 28nm HLP process
Input 0.945V-1.155V, VBG=0.8V, Band Gap, UMC 28m HLP process....
1336
0.118
Band Gap IP, Input: 0.9V - 1.1V, VBG=0.5V, UMC 90nm SP process
Input 0.9V-1.1V, VBG=0.5V, Band Gap, UMC 90nm SP/RVT Logic Low-K process....
1337
0.118
Band Gap IP, Input: 1.08V - 1.32V, VBG=0.6V, UMC 90nm LL process
Input 1.08V-1.32V, VBG=0.6V, Band Gap, LL process, UMC 90 nm LL Logic/RVT Low-K process....
1338
0.118
Band Gap IP, Input: 1.0V - 1.2V, VBG=0.8V, UMC 0.13um LL/FSG process
VBG=0.8V, VCCA=1.2V, VCCA_min=1.0V, Ivcca=45uA, UMC 0.13um LL Logic/FSG process....
1339
0.118
Band Gap IP, Input: 1.0V - 1.5V, VBG=0.615V, UMC 0.13um HS/FSG process
Input 1.0V-1.5V, VBG=0.615V, Bnad Gap, HS process, UMC 0.13um HS/FSG Logic process....
1340
0.118
Band Gap IP, Input: 1.0V - 1.5V, VBG=0.615V, UMC 0.15um SP process
VBG=0.615V, VCCA=1.5V, VCCA_min=1.0V, Ivcca=23uA, UMC 0.15um SP Logic process....
1341
0.118
Band Gap IP, Input: 1.0V - 1.8V, VBG=0.615V, UMC 0.18um G2 process
VBG=0.615V, VCCA=1.8V, VCCA_min=1.0V, Ivcca=23uA, UMC 0.18um GII Logic process low voltage....
1342
0.118
Band Gap IP, Input: 1.0V - 1.8V, VBG=0.615V, UMC 0.18um LL process
VBG=0.615V, VCCA=1.8V, VCCA_min=1.0V, Ivcca=23uA, UMC 0.18um LL Logic process....
1343
0.118
Band Gap IP, Input: 1.0V ~ 2.1V, VBG=0.615V, UMC 0.18um G2 process
UMC 0.18um process 1.8V power supply bandgap reference circuit (layout data base with trimming pad), VBG=0.615V....
1344
0.118
Band Gap IP, Input: 1.1V, VBG=0.48V, UMC 40nm LP process
Input 1.1V, VBG=0.48V, Band Gap, UMC 40nm LP/RVT Low-K Logic process....
1345
0.118
Band Gap IP, Input: 1.1V, VBG=0.8V, UMC 40nm LP process
Input 1.1V, VBG=0.8V, Band Gap, UMC 40nm LP/RVT Low-K Logic process....
1346
0.118
Band Gap IP, Input: 1.2V - 1.98V, VBG=0.615V, UMC 0.153um Logic process
Input 1.2V-1.98V, VBG=0.615V bandgap, UMC 0.153um Logic process....
1347
0.118
Band Gap IP, Input: 1.2V - 3.3V, VBG=0.615V, UMC 0.18um G2 process
VBG=0.615V, VCCAH=3.3V, VCCAH_min=1.2V, Ivccah=25uA, UMC 0.18um GII Logic process....
1348
0.118
Band Gap IP, Input: 1.2V - 4V, VBG=0.615V, UMC 0.18um LL process
0.18um, LL, bandgap, VBG=0.615 at VCCAH=1.2V~4V, UMC 0.18um LL Logic process....
1349
0.118
Band Gap IP, Input: 1.2V, VBG=0.4V, Operating current less than 70uA (125C), 1uA standby current, UMC 55nm LP process
Input 1.2V, VBG04=0.4V bandgap, UMC 55nm LP/RVT Low-K Logic process....
1350
0.118
Band Gap IP, Input: 1.2V, VBG=0.8V, UMC 0.13um HS/FSG process
VBG=0.8V, VCCA=1.2V, VCCA_min=1.0V, Ivcca=47uA, HS process, UMC 0.13um HS/FSG Logic process....